摘要:
A head drive motor operating circuit comprises a first delay circuit for generating a first pulse of duration T1 in response to an end-of-seek pulse which is generated by a control circuit. A second delay circuit is provided for generating a second pulse of duration T2 in response to the seek command input pulse if it occurs in the presence of the first pulse and for generating a seek command output pulse for application to the motor and at the end of the second pulse or in response to the seek command input pulse if it occurs in the absence of the first pulse. A seek inhibit signal is generated during an interval between the seek command output pulse and a subsequent end-of-seek pulse and applied to the control circuit to prevent it from initiating the next seek. If a seek command input pulse is generated immediately following an end-of-seek pulse, a delay time of at least T2 is therefore introduced to the application of a seek command output pulse to the motor, reducing the amount of currents to be supplied to the motor for a given interval of time.
摘要:
In a disk array apparatus which includes disk units so as to have a redundancy and which carries out, in response to a data writing instruction or a data reading instruction from a host computer, a data writing operation or a data reading operation between the disk units and the host computer, detector/memory section (211) detects, as a faulty unit, one of the disk units in which an abnormality occurs on any one of the data writing operation and the data reading operation. A disconnection managing section (212a) temporarily disconnects the faulty unit as a temporarily disconnected unit to make the disk array apparatus operate in a temporary degenerate mode. An instruction-execution controlling section (212) forces the disk units except the temporarily disconnected unit to execute the data writing operation or the reading operation between the disk units except the temporarily disconnected unit and the host computer by the use of the redundancy when the disk array apparatus receives, during the temporary degenerate mode, the data writing instruction or the data reading instruction from the host computer. A retry section (212c) carries out retry for the temporarily disconnected unit in parallel to the data writing operation or the data reading operation executed between the disk units except the temporarily disconnected unit and the host computer.