公开(公告)号：US06788668B1

公开(公告)日：2004-09-07

申请号：US09515222

申请日：2000-02-29

申请人： Yogendra Champaklal Shah ,  Reza Aghazadeh-Alavi ,  Karim Nassiri Toussi ,  Sharad D. Sambhwani

发明人： Yogendra Champaklal Shah ,  Reza Aghazadeh-Alavi ,  Karim Nassiri Toussi ,  Sharad D. Sambhwani

IPC分类号： H04B7216

CPC分类号： H04W52/029 ,  H04B2201/70709 ,  H04J13/0025 ,  H04J13/10 ,  Y02D70/00

摘要： In one embodiment, the present invention is a method for conserving power supplied to a linear feedback shift register (LFSR) long code (LC) generator, the method including steps of operating the LC generator during pre-assigned time slots; shutting off the LC generator during standby periods between the pre-assigned time slots; and priming starting states of the LC generator for synchronization with pre-assigned time slots following a standby period. This embodiment of the present invention enables power to be removed from the LFSR LC generator as well as the LFSR clock. Because the accuracy of the LFSR clock is usually derived from a system master transistor-controlled crystal oscillator (TCXO), and because the LFSR clock operates at a relatively high rate, the TCXO can also be powered down to conserve power. A low frequency, low power clock source can then be used instead of the higher powered clock source and TCXO to maintain operation of the mobile during the mobile sleep state.

摘要翻译： 在一个实施例中，本发明是一种用于节省提供给线性反馈移位寄存器（LFSR）长码（LC）发生器的功率的方法，该方法包括在预分配时隙期间操作LC发生器的步骤; 在预分配的时隙之间的待机期间关闭LC发生器; 以及启动LC发生器的启动状态，以在等待时间段之后与预分配的时隙同步。 本发明的该实施例使得能够从LFSR LC发生器以及LFSR时钟中去除功率。 由于LFSR时钟的精度通常来自系统主晶体管控制晶体振荡器（TCXO），并且由于LFSR时钟以较高的速率工作，因此TCXO也可以掉电以节省功耗。 然后可以使用低频，低功率时钟源而不是较高功率的时钟源和TCXO，以在移动睡眠状态期间保持移动设备的操作。

公开(公告)号：US06532222B1

公开(公告)日：2003-03-11

申请号：US09186765

申请日：1998-11-05

申请人： Kiran Meghashyam Rege ,  Krishna Balachandran ,  Kirk Kuokuang Chang ,  Zhendong Cao ,  Abdulkadir Dinc ,  Yogendra Champaklal Shah

发明人： Kiran Meghashyam Rege ,  Krishna Balachandran ,  Kirk Kuokuang Chang ,  Zhendong Cao ,  Abdulkadir Dinc ,  Yogendra Champaklal Shah

IPC分类号： H04B7216

CPC分类号： H04B17/327

摘要： Demodulator assignment logic is provided that confirms the presence and quality of a multipath before assigning a parallel demodulator to that multipath. Multipath presence and quality are confirmed when at least two power measurements of a multipath at least equal a selectable power threshold. Before permitting demodulated data from an assigned demodulator to be processed, demodulator assignment logic further reconfirms the presence and quality of a multipath via another more reliable power measurement that at least equals another selectable power threshold.

摘要翻译： 提供了解调器分配逻辑，在将并行解调器分配给该多路径之前，确认多路径的存在和质量。 当多路径的至少两个功率测量至少等于可选择的功率阈值时，确认多路径存在和质量。 在允许来自分配的解调器的解调数据被处理之前，解调器分配逻辑还通过至少等于另一可选功率阈值的另一更可靠的功率测量进一步重新确认多路径的存在和质量。