公开(公告)号：US08519754B2

公开(公告)日：2013-08-27

申请号：US13367088

申请日：2012-02-06

申请人： Yongsheng Su ,  Liqiang Zhu ,  Qiang Luo ,  Lieyi Fang

发明人： Yongsheng Su ,  Liqiang Zhu ,  Qiang Luo ,  Lieyi Fang

IPC分类号： H03L7/00

CPC分类号： H03L7/00 ,  H05B33/0815 ,  Y02B20/346

摘要： System and method for signal synchronization. The system includes a first selection component, a first signal generator, a second signal generator and a first gate drive component. The first selection component is configured to receive a first mode signal and generate a first selection signal based on at least information associated with the first mode signal. The first signal generator is configured to, if the first selection signal satisfies one or more first conditions, receive a first input signal and generate at least a first clock signal based on at least information associated with the first input signal. Furthermore, the first gate drive component is configured to, if the first selection signal satisfies the one or more first conditions, receive at least the first clock signal and output a first drive signal to a first switch.

公开(公告)号：US20130169325A1

公开(公告)日：2013-07-04

申请号：US13367088

申请日：2012-02-06

申请人： Yongsheng Su ,  Liqiang Zhu ,  Qiang Luo ,  Lieyi Fang

发明人： Yongsheng Su ,  Liqiang Zhu ,  Qiang Luo ,  Lieyi Fang

IPC分类号： H03L7/00

CPC分类号： H03L7/00 ,  H05B33/0815 ,  Y02B20/346

摘要： System and method for signal synchronization. The system includes a first selection component, a first signal generator, a second signal generator and a first gate drive component. The first selection component is configured to receive a first mode signal and generate a first selection signal based on at least information associated with the first mode signal. The first signal generator is configured to, if the first selection signal satisfies one or more first conditions, receive a first input signal and generate at least a first clock signal based on at least information associated with the first input signal. Furthermore, the first gate drive component is configured to, if the first selection signal satisfies the one or more first conditions, receive at least the first clock signal and output a first drive signal to a first switch.

摘要翻译： 用于信号同步的系统和方法 该系统包括第一选择部件，第一信号发生器，第二信号发生器和第一栅极驱动部件。 第一选择部件被配置为接收第一模式信号并且至少基于与第一模式信号相关联的信息产生第一选择信号。 第一信号发生器被配置为，如果第一选择信号满足一个或多个第一条件，则至少基于与第一输入信号相关联的信息，接收第一输入信号并产生至少第一时钟信号。 此外，第一栅极驱动部件被配置为，如果第一选择信号满足一个或多个第一条件，则至少接收第一时钟信号并将第一驱动信号输出到第一开关。