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公开(公告)号：US09367080B2
公开(公告)日：2016-06-14
申请号：US13334672
申请日：2011-12-22
CPC分类号： G06F1/10
摘要： Described herein are apparatus, system, and method for providing clock signal on demand. The method comprises determining an indication of clock signal usage in multiple hardware logic units; generating an enable signal according to the indication; and gating or un-gating the clock signal for clock islands of at least a hardware logic unit, of the multiple hardware logic units, in response to a logic level of the enable signal, wherein the clock islands are part of a global clock distribution network and are operable to be enabled or disabled independently.
摘要翻译： 这里描述的是用于根据需要提供时钟信号的装置，系统和方法。 该方法包括确定多个硬件逻辑单元中的时钟信号使用的指示; 根据该指示产生使能信号; 以及响应于所述使能信号的逻辑电平，对所述多个硬件逻辑单元的至少硬件逻辑单元的时钟岛进行门控或去门控时钟信号，其中所述时钟岛是全局时钟分配网络的一部分 并且可以独立地启用或禁用。
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公开(公告)号：US20130166939A1
公开(公告)日：2013-06-27
申请号：US13334672
申请日：2011-12-22
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： Described herein are apparatus, system, and method for providing clock signal on demand. The method comprises determining an indication of clock signal usage in multiple hardware logic units; generating an enable signal according to the indication; and gating or un-gating the clock signal for clock islands of at least a hardware logic unit, of the multiple hardware logic units, in response to a logic level of the enable signal, wherein the clock islands are part of a global clock distribution network and are operable to be enabled or disabled independently.
摘要翻译： 这里描述的是用于根据需要提供时钟信号的装置，系统和方法。 该方法包括确定多个硬件逻辑单元中的时钟信号使用的指示; 根据该指示产生使能信号; 以及响应于所述使能信号的逻辑电平，对所述多个硬件逻辑单元的至少硬件逻辑单元的时钟岛进行门控或去门控时钟信号，其中所述时钟岛是全局时钟分配网络的一部分 并且可以独立地启用或禁用。
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