公开(公告)号：US20070279946A1

公开(公告)日：2007-12-06

申请号：US11772602

申请日：2007-07-02

申请人： Hiroki TODA ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki TODA ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

摘要翻译： 交替激活的第一和第二半导体开关设置在初级绕组的端部和公共电位点之间，其中DC电源电压被提供给中心抽头。 流入负载的电流被反馈，从而使半导体开关进行PWM控制。 由电容器和半导体开关组成的串联电路连接在初级绕组的中心抽头和其一端之间。 半导体开关与第一和第二半导体开关同步地被激活，从而防止在切换操作时会引起异常高电压的发生。

公开(公告)号：US07248488B2

公开(公告)日：2007-07-24

申请号：US11521418

申请日：2006-09-13

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335 ,  H02M7/538 ,  H02M7/122

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

摘要翻译： 交替激活的第一和第二半导体开关设置在初级绕组的端部和公共电位点之间，其中DC电源电压被提供给中心抽头。 流入负载的电流被反馈，从而使半导体开关进行PWM控制。 由电容器和半导体开关组成的串联电路连接在初级绕组的中心抽头和其一端之间。 半导体开关与第一和第二半导体开关同步地被激活，从而防止在切换操作时会引起异常高电压的发生。

公开(公告)号：US07633769B2

公开(公告)日：2009-12-15

申请号：US11772602

申请日：2007-07-02

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335 ,  H02H7/122 ,  H02M7/538

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

摘要翻译： 交替激活的第一和第二半导体开关设置在初级绕组的端部和公共电位点之间，其中DC电源电压被提供给中心抽头。 流入负载的电流被反馈，从而使半导体开关进行PWM控制。 由电容器和半导体开关组成的串联电路连接在初级绕组的中心抽头和其一端之间。 半导体开关与第一和第二半导体开关同步地被激活，从而防止在切换操作时会引起异常高电压的发生。

公开(公告)号：US07126831B2

公开(公告)日：2006-10-24

申请号：US11340396

申请日：2006-01-26

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335 ,  H02M7/538 ,  H02H7/122

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

公开(公告)号：US07046526B2

公开(公告)日：2006-05-16

申请号：US10806262

申请日：2004-03-22

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335 ,  H02M3/315

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

公开(公告)号：US20070008751A1

公开(公告)日：2007-01-11

申请号：US11521418

申请日：2006-09-13

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.

公开(公告)号：US20060120117A1

公开(公告)日：2006-06-08

申请号：US11340396

申请日：2006-01-26

申请人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

发明人： Hiroki Toda ,  Kenichi Fukumoto ,  Yosuke Aoyagi ,  Hiroyuki Fujita

IPC分类号： H02M3/335

CPC分类号： H02M7/5381 ,  H02M3/3372 ,  H02M2001/0048 ,  H05B41/2824 ,  H05B41/3927 ,  Y02B70/1491

摘要： First and second semiconductor switches which are activated alternately are provided between ends of a primary winding and a common potential point, wherein a DC power supply voltage is supplied to a center tap. An electric current flowing into a load is fed back to thereby subject the semiconductor switches to PWM control. Series circuits consisting of capacitors and semiconductor switches are connected between the center tap of the primary winding and the ends of the same. The semiconductor switches are activated in synchronism with the first and second semiconductor switches, thereby preventing occurrence of an anomalous high voltage, which would otherwise be caused at the time of switching operation.