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公开(公告)号:US06508740B2
公开(公告)日:2003-01-21
申请号:US09941847
申请日:2001-08-30
申请人: Hiroyuki Kimura , Yuuji Okazaki , Masamichi Kagawa
发明人: Hiroyuki Kimura , Yuuji Okazaki , Masamichi Kagawa
IPC分类号: F16H6334
CPC分类号: F16H61/143 , Y10T74/19163 , Y10T477/635 , Y10T477/6351
摘要: An automatic transmission for a vehicle comprises a torque converter TC equipped with a lock-up clutch 4. This automatic transmission further comprises FIRST˜FOURTH speed clutches 31˜34 for a shift control executing a shift from off-going speed ratio to an on-coming speed ratio by controlling the release of the hydraulic pressure from the off-going clutch and by controlling the supply of the hydraulic pressure to the on-coming clutch. A control system comprises first and second off-going pressure releasing valves 70 and 80, which release the hydraulic pressure from the off-going clutch during the shift, a lock-up control valve 40 and a lock-up timing valve 50, which control the engagement of the lock-up mechanism, and a linear solenoid valve 60, which supplies a control pressure to these valves and controls the operation of these valves.
摘要翻译: 一种用于车辆的自动变速器包括配备有锁止离合器4的变矩器TC。该自动变速器还包括用于执行从脱离速度变速到从动变速比的换挡的第一〜第四速度离合器31〜34, 通过控制离合离合器的液压释放并控制向即将离合器的液压的供给。 一个控制系统包括第一和第二脱离压力释放阀70和80,它们在换档过程中释放来自脱离离合器的液压压力,锁定控制阀40和锁定正时阀50,其控制 锁定机构的接合和线性电磁阀60,其向这些阀提供控制压力并控制这些阀的操作。
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公开(公告)号:US6072948A
公开(公告)日:2000-06-06
申请号:US17318
申请日:1998-02-02
CPC分类号: G06F17/5022
摘要: A logical simulation device has a delay value calculations section to calculate delay values of circuit blocks in a semiconductor integrated circuit as a target of logical simulation based on logical circuit information relating to the logical circuit blocks, input test patterns as operational descriptions of used in circuit verification, and delay value calculation information stored in a delay value and timing check value calculation library, and a logical simulation section performs the logical simulation of the semiconductor integrated circuit based on the calculated delay values.
摘要翻译: 逻辑模拟装置具有延迟值计算部分,用于基于与逻辑电路块相关的逻辑电路信息计算半导体集成电路中的电路块的延迟值作为逻辑仿真的目标,输入测试图案作为电路中使用的操作描述 验证和延迟值计算信息存储在延迟值和定时检查值计算库中,并且逻辑模拟部分基于所计算的延迟值来执行半导体集成电路的逻辑模拟。
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公开(公告)号:US06511400B2
公开(公告)日:2003-01-28
申请号:US09941983
申请日:2001-08-30
申请人: Hiroyuki Kimura , Yasuhiro Ijichi , Yuuji Okazaki
发明人: Hiroyuki Kimura , Yasuhiro Ijichi , Yuuji Okazaki
IPC分类号: F16H6100
CPC分类号: F16H61/143 , F16H61/061 , Y10T477/6895 , Y10T477/6936 , Y10T477/6937 , Y10T477/69395
摘要: A control system for executing an upshift from an off-going speed ratio to an on-coming speed ratio by controlling the release of the hydraulic pressure from the frictionally engaging element used for the off-going speed ratio and by controlling the supply of the hydraulic pressure to the frictionally engaging element used for the on-coming speed ratio comprises first and second off-going pressure releasing valves 70 and 80, which release the hydraulic pressure of the frictionally engaging element used for the off-going speed ratio, and a linear solenoid valve 60, which controls the operation of the off-going pressure releasing valves. The linear solenoid valve 60 controls the operation of the off-going pressure releasing valves in correspondence to the throttle opening of the engine. In this case, the smaller the throttle opening of the engine, the earlier the timing for releasing the hydraulic pressure from the frictionally engaging element used for the off-going speed ratio is set.
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