公开(公告)号：US20210373975A1

公开(公告)日：2021-12-02

申请号：US17029935

申请日：2020-09-23

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Alexandru DUTU ,  Matthew David SINCLAIR ,  Bradford BECKMANN ,  David A. WOOD

IPC: G06F9/52 ,  G06N20/00 ,  G06F11/30 ,  G06F11/34 ,  G06F9/46 ,  G06F9/30

Abstract: A processing system monitors and synchronizes parallel execution of workgroups (WGs). One or more of the WGs perform (e.g., periodically or in response to a trigger such as an indication of oversubscription) a waiting atomic instruction. In response to a comparison between an atomic value produced as a result of the waiting atomic instruction and an expected value, WGs that fail to produce a correct atomic value are identified as being in a waiting state (e.g., waiting for a synchronization variable). Execution of WGs in the waiting state is prevented (e.g., by a context switch) until corresponding synchronization variables are released.

公开(公告)号：US20200167191A1

公开(公告)日：2020-05-28

申请号：US16200503

申请日：2018-11-26

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Tsung Tai YEH ,  Bradford BECKMANN ,  Sooraj PUTHOOR ,  Matthew David SINCLAIR

IPC: G06F9/48

Abstract: A processing system includes a task queue, a laxity-aware task scheduler coupled to the task queue, and a workgroup dispatcher coupled to the laxity-aware task scheduler. Based on a laxity evaluation of laxity values associated with a plurality of tasks stored in the task queue, the workgroup dispatcher schedules the plurality of tasks. The laxity evaluation includes determining a priority of each task of the plurality of tasks. The laxity value is determined using laxity information, where the laxity information includes an arrival time, a task duration, a task deadline, and a number of workgroups.

公开(公告)号：US20200004586A1

公开(公告)日：2020-01-02

申请号：US16024244

申请日：2018-06-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Alexandru DUTU ,  Matthew David SINCLAIR ,  Bradford BECKMANN ,  David A. WOOD

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38

Abstract: A first workgroup is preempted in response to threads in the first workgroup executing a first wait instruction including a first value of a signal and a first hint indicating a type of modification for the signal. The first workgroup is scheduled for execution on a processor core based on a first context after preemption in response to the signal having the first value. A second workgroup is scheduled for execution on the processor core based on a second context in response to preempting the first workgroup and in response to the signal having a second value. A third context it is prefetched into registers of the processor core based on the first hint and the second value. The first context is stored in a first portion of the registers and the second context is prefetched into a second portion of the registers prior to preempting the first workgroup.