公开(公告)号：US11921634B2

公开(公告)日：2024-03-05

申请号：US17564155

申请日：2021-12-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Jagadish B. Kotra ,  John Kalamatianos ,  Yasuko Eckert ,  Yonghae Kim

IPC: G06F12/0811

CPC classification number: G06F12/0811

Abstract: Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host is disclosed. In an implementation, a memory controller identifies a first write instruction to write first data to a first memory location, where the first write instruction is not a processing-in-memory (PIM) instruction. The memory controller then writes the first data to a first PIM register. Opportunistically, the memory controller moves the first data from the first PIM register to the first memory location. In another implementation, a memory controller identifies a first memory location associated with a first read instruction, where the first read instruction is not a processing-in-memory (PIM) instruction. The memory controller identifies that a PIM register is associated with the first memory location. The memory controller then reads, in response to the first read instruction, first data from the PIM register.