公开(公告)号：US11880215B2

公开(公告)日：2024-01-23

申请号：US17599345

申请日：2020-03-27

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： Jianming Zhao ,  Yuan Gao

IPC: G05F1/575 ,  G05F1/563 ,  G05F1/595

CPC classification number: G05F1/575 ,  G05F1/563 ,  G05F1/595

Abstract: This disclosure relates to a digital comparator coupled to a pair of pull-up resistors and a pair of pull-down resistors whereby both pairs of resistors are coupled to an output terminal of a low dropout (LDO) regulator. In particular, the digital comparator comprises an edge detector module, a consecutive two-edge detector module and a consecutive three-edge detector module whereby the edge detector module is configured to receive two clock signals as inputs and after being processed by these three modules, to pull-up or pull-down the resistors at the output terminal of the LDO regulator based on the rising and falling edges of the received clock signals.