公开(公告)号：US20140080430A1

公开(公告)日：2014-03-20

申请号：US14022122

申请日：2013-09-09

Applicant: Agency for Science, Technology and Research

Inventor： Jung Hyup LEE ,  Vishal Vinayak KULKARNI ,  Tao WANG ,  Jun ZHOU ,  Xin LIU ,  Minkyu JE

IPC: H04B13/00

CPC classification number: H04B13/005

Abstract: In various embodiments of the present disclosure, there is provided a receiver for body channel communication. The receiver includes an electrode configured to receive an incoming signal transmitted as a multi-level transmission signal from a transmitter through a body channel, a differentiator configured to obtain a time derivative of the incoming signal indicating a plurality of data transitions, and an analog to digital converter configured to generate a multi-level output signal representing the multi-level transmission signal based on the plurality of data transitions. A corresponding method of controlling a receiver for body channel communications is provided.

Abstract translation: 在本公开的各种实施例中，提供了一种用于身体信道通信的接收机。 接收机包括被配置为接收通过身体信道从发射机作为多级传输信号发送的输入信号的电极，被配置为获得指示多个数据转换的输入信号的时间导数的微分器，以及模拟到 数字转换器，被配置为基于所述多个数据转换来生成表示所述多级传输信号的多电平输出信号。 提供了一种用于控制身体信道通信的接收机的相应方法。

公开(公告)号：US20160135705A1

公开(公告)日：2016-05-19

申请号：US14897581

申请日：2014-06-12

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： Xin LIU ,  Jun ZHOU

IPC: A61B5/04 ,  A61B5/0472 ,  A61B5/00 ,  A61B5/0428

CPC classification number: A61B5/04012 ,  A61B5/0428 ,  A61B5/0472 ,  A61B5/0476 ,  A61B5/4812 ,  A61B5/4836 ,  A61B5/7203 ,  G01R19/2509

Abstract: An electrocardiogram (ECG) signal processing system is provided. The ECG signal processing system comprises an analog-to-digital converter (ADC) configured to convert an input analog ECG signal into a digital ECG signal, and a digital signal processing engine (DSPE) coupled to the ADC to receive the digital ECG signal. The DSPE is configured to decompose and reconstruct the digital ECG signal. A dynamic system clock source is coupled to the ADC and the DSPE for dynamic signal sampling, the dynamic system clock source clocking the ADC and the DSPE at a first frequency f1 to detect one or more first parameters of the input analog ECG signal and at a second frequency f2 to detect one or more second parameters of the input analog ECG signal.

Abstract translation: 提供心电图（ECG）信号处理系统。 ECG信号处理系统包括被配置为将输入的模拟ECG信号转换为数字ECG信号的模数转换器（ADC）以及耦合到ADC的数字信号处理引擎（DSPE）以接收数字ECG信号。 DSPE被配置为分解和重建数字ECG信号。 动态系统时钟源耦合到ADC和DSPE用于动态信号采样，动态系统时钟源以第一频率f1为ADC和DSPE提供时钟，以检测输入模拟ECG信号的一个或多个第一参数， 第二频率f2以检测输入的模拟ECG信号的一个或多个第二参数。

公开(公告)号：US20160116937A1

公开(公告)日：2016-04-28

申请号：US14897134

申请日：2014-06-05

Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH

Inventor： Jun ZHOU ,  Xin LIU

IPC: G06F1/08

CPC classification number: G06F1/08 ,  H03K3/0375

Abstract: A method for detecting and correcting an error in a circuit is provided. The circuit is configured to receive an input signal and clock the input signal with a rising and falling timing signal. The method includes detecting late arrival signal transition of the input signal, at an intermediate point of a path, the path being one through which the input signal transits. The method further includes predicting an error in the input signal in response to detecting the late arrival signal transition at the intermediate point of the path. In addition, the method includes correcting the error in the input signal by manipulating the timing signal and/or a supply voltage.

Abstract translation: 提供了一种用于检测和校正电路中的误差的方法。 电路被配置为接收输入信号并且通过上升和下降定时信号对输入信号进行时钟。 该方法包括检测输入信号的延迟到达信号转变，在路径的中间点，该路径是输入信号通过的路径。 该方法还包括响应于检测到在路径的中间点的迟到到达信号转变来预测输入信号中的误差。 此外，该方法包括通过操纵定时信号和/或电源电压来校正输入信号中的误差。