公开(公告)号：US20120179847A1

公开(公告)日：2012-07-12

申请号：US13004890

申请日：2011-01-12

Applicant: ALAN BERENBAUM

Inventor： ALAN BERENBAUM

IPC: G06F13/36

CPC classification number: G06F13/4208

Abstract: The present disclosure describes a system and method for implementing bus operations with precise timing. The system includes a trigger descriptor register for a bus operation. The trigger descriptor register includes a bus definition field, which further includes data and address fields for providing data and address information for the bus operation. The trigger descriptor register may also include a holdoff time field to store a time value and includes an event select field to select a trigger for the bus operation. A processor configures the trigger descriptor register. A counter may count based on a time period such that at the end of the counting, the bus operation is performed based on the data and address fields. The time period is derived from one or more of the holdoff field or an external timer. The disclosed method and system employ hardware assist for maintaining precise timing while performing bus operations.

Abstract translation: 本公开描述了一种用于以精确的定时实现总线操作的系统和方法。 该系统包括用于总线操作的触发器描述符寄存器。 触发描述符寄存器包括总线定义字段，其还包括用于为总线操作提供数据和地址信息的数据和地址字段。 触发描述符寄存器还可以包括用于存储时间值的保留时间字段，并且包括事件选择字段以选择用于总线操作的触发。 处理器配置触发器描述符寄存器。 计数器可以基于时间段进行计数，使得在计数结束时，基于数据和地址字段执行总线操作。 该时间段从一个或多个保留字段或外部定时器导出。 所公开的方法和系统在执行总线操作时采用硬件辅助来维持精确定时。