公开(公告)号：US20180269924A1

公开(公告)日：2018-09-20

申请号：US15921112

申请日：2018-03-14

Applicant: ANRITSU CORPORATION

Inventor： Ittetsu KAJI ,  Kazuhiro YAMANE

IPC: H04B1/7087

CPC classification number: H04B1/7087 ,  H03C3/00 ,  H03L7/18 ,  H04B15/04 ,  H04B2201/70728 ,  H04B2201/7073 ,  H04L7/0331

Abstract: Provided is a technique that can generate a spread spectrum clock signal in all of an upper-spread mode, a down-spread mode, and a center-spread mode. A spread spectrum clock generator (2) spreads a spectrum of a signal with a predetermined carrier frequency to generate a spread spectrum clock signal under the control of a control unit (13). The control unit includes carrier frequency correction control means (13b). The carrier frequency correction control means shifts the predetermined carrier frequency to generate, from one spread mode, a spread spectrum clock signal of another pseudo spread mode.

公开(公告)号：US20240176387A1

公开(公告)日：2024-05-30

申请号：US18485814

申请日：2023-10-12

Applicant: ANRITSU CORPORATION

Inventor： Kazuhiro YAMANE

IPC: G06F1/12 ,  H04B1/7087

CPC classification number: G06F1/12 ,  H04B1/7087

Abstract: A clock recovery circuit includes a reference clock generation unit that generates a reference clock subjected to SSC modulation, a clock recovery unit that recovers an SSC modulated clock of a data signal subjected to the SSC modulation in synchronization with the reference clock, and a modulation signal generation unit that generates a modulation signal based on cycle information indicating a cycle of a FM demodulated signal obtained by performing FM demodulation on the SSC modulated clock recovered by the clock recovery unit and slope information indicating a slope of the FM demodulated signal, in which the reference clock generation unit generates the reference clock by performing the SSC modulation on a clock of a VCO with the modulation signal, and feeds back the reference clock subjected to the SSC modulation to the clock recovery unit.

公开(公告)号：US20180270090A1

公开(公告)日：2018-09-20

申请号：US15888364

申请日：2018-02-05

Applicant: ANRITSU CORPORATION

Inventor： Kazuhiro YAMANE

IPC: H04L25/49 ,  H04L25/02

Abstract: A three-valued signal generation device includes a first differential amplifier that outputs a differential signal, a second differential amplifier that outputs a differential signal and an inverted differential signal in accordance with a level based on a reference voltage of an inverted pseudo LFPS signal, which is obtained by inverting a logic level of the pseudo LFPS signal, a first signal synthesis unit that synthesizes the differential signal from the first differential amplifier and the inverted differential signal from the second differential amplifier to perform positive logic output of a three-valued LFPS signal, and a second signal synthesis unit that synthesizes the inverted differential signal from the first differential amplifier and the differential signal from the second differential amplifier to perform negative logic output of the three-valued LFPS signal.

公开(公告)号：US20160190797A1

公开(公告)日：2016-06-30

申请号：US14886707

申请日：2015-10-19

Applicant: ANRITSU CORPORATION

Inventor： Kazuhiro YAMANE

IPC: H02H7/122 ,  H02M7/539

CPC classification number: H04L25/0284 ,  H02H3/087

Abstract: The synthetic circuit 16 synthesizes an offset voltage from an offset voltage generator 14 with a signal output from the other end of the first coil 15 and supplies the synthesized signal to the other end of the second coil 18 through an output matching resistor 17. A potential difference detection unit 21 detects a potential difference between both ends of the output matching resistor 17. A comparison circuit 23 outputs an overcurrent detection signal when a voltage value of a detection signal from the potential difference detection unit 21 exceeds a positive or negative threshold voltage. When the overcurrent detection signal is input, a control unit 24 turns off the switching means 19 and forcibly disconnects the synthetic circuit 16 from the output matching resistor 17.

Abstract translation: 合成电路16从偏移电压发生器14合成具有从第一线圈15的另一端输出的信号的偏移电压，并通过输出匹配电阻器17将合成信号提供给第二线圈18的另一端。电位 差分检测单元21检测输出匹配电阻器17的两端之间的电位差。当来自电位差检测单元21的检测信号的电压值超过正或负阈值电压时，比较电路23输出过电流检测信号。 当输入过电流检测信号时，控制单元24关闭开关装置19并强制将合成电路16与输出匹配电阻器17断开。