Displays having transparent openings

    公开(公告)号:US12052891B2

    公开(公告)日:2024-07-30

    申请号:US18006519

    申请日:2021-07-07

    Applicant: Apple Inc.

    CPC classification number: H10K59/1213 G09G3/3266 H10K59/353 H10K59/90

    Abstract: An electronic device may include a display and an optical sensor formed underneath the display. The electronic device may include a plurality of transparent windows that overlap the optical sensor. The resolution of the display panel may be reduced in some areas due to the presence of the transparent windows. To mitigate diffraction artifacts, a first sensor (13-1) may sense light through a first pixel removal region having transparent windows arranged according to a first pattern. A second sensor (13-2) may sense light through a second pixel removal region having transparent windows arranged according to a second pattern that is different than the first pattern. The first and second patterns of the transparent windows may result in the first and second sensors having different diffraction artifacts. Therefore, an image from the first sensor may be corrected for diffraction artifacts based on an image from the second sensor.

    Displays with data lines that accommodate openings

    公开(公告)号:US11579503B2

    公开(公告)日:2023-02-14

    申请号:US17525118

    申请日:2021-11-12

    Applicant: Apple Inc.

    Abstract: To minimize the width of a non-light-emitting border region around an opening in the active area, data lines may be stacked in the border region. Data line portions may be formed using three metal layers in three different planes within the border region. A metal layer that forms a positive power signal distribution path in the active area may serve as a data line portion in the border region. A metal layer may be added in the border region to serve as a data line portion in the border region. Data line signals may also be provided to pixels on both sides of an opening in the active area using supplemental data line paths. A supplemental data line path may be routed through the active area of the display to electrically connect data line segments on opposing sides of an opening within the display.

    Displays with Supplemental Loading Structures

    公开(公告)号:US20210375225A1

    公开(公告)日:2021-12-02

    申请号:US17401117

    申请日:2021-08-12

    Applicant: Apple Inc.

    Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

    Displays with supplemental loading structures

    公开(公告)号:US11100877B2

    公开(公告)日:2021-08-24

    申请号:US16518527

    申请日:2019-07-22

    Applicant: Apple Inc.

    Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

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