公开(公告)号：US09234942B2

公开(公告)日：2016-01-12

申请号：US13624372

申请日：2012-09-21

Applicant: Apple Inc.

Inventor： Anuja Banerjee ,  Samy R. Makar ,  Vijay M. Bettada

IPC: G01R31/3185

CPC classification number: G01R31/318594

Abstract: A method and apparatus for conducting a transition test of a source synchronous interface is disclosed. A system includes a source synchronous transmitter and source synchronous receiver. The source synchronous transmitter includes a first scannable flop having an output coupled to a data input of a second scannable flop in the source synchronous receiver. During a transition test, the source synchronous transmitter is configured to transmit data from the first scannable flop to the second scannable flop, along with a clock signal at an operational clock speed. The first scannable flop is coupled to feedback circuitry configured to cause transitions of the transmitted data. The second scannable flop may capture the transmitted data. The captured data may be subsequently used to determine if the desired transitions were detected by the second scannable flop.

Abstract translation: 公开了一种用于进行源同步接口的转换测试的方法和装置。 系统包括源同步发射机和源同步接收机。 源同步发射机包括第一可扫描触发器，其具有耦合到源同步接收器中的第二可扫描触发器的数据输入的输出。 在转换测试期间，源同步发射机被配置为将数据从第一可扫描触发器发送到第二可扫描触发器，以及以操作时钟速度的时钟信号。 第一可扫描触发器耦合到被配置为引起发送数据的转换的反馈电路。 第二个可扫描的触发器可以捕获所发送的数据。 捕获的数据可以随后用于确定是否由第二可扫描的翻转器检测到期望的转换。

公开(公告)号：US20140088912A1

公开(公告)日：2014-03-27

申请号：US13624372

申请日：2012-09-21

Applicant: APPLE INC.

Inventor： Anuja Banerjee ,  Samy R. Makar ,  Vijay M. Bettada

IPC: G01R31/26 ,  G06F19/00

CPC classification number: G01R31/318594

Abstract: A method and apparatus for conducting a transition test of a source synchronous interface is disclosed. A system includes a source synchronous transmitter and source synchronous receiver. The source synchronous transmitter includes a first scannable flop having an output coupled to a data input of a second scannable flop in the source synchronous receiver. During a transition test, the source synchronous transmitter is configured to transmit data from the first scannable flop to the second scannable flop, along with a clock signal at an operational clock speed. The first scannable flop is coupled to feedback circuitry configured to cause transitions of the transmitted data. The second scannable flop may capture the transmitted data. The captured data may be subsequently used to determine if the desired transitions were detected by the second scannable flop.

Abstract translation: 公开了一种用于进行源同步接口的转换测试的方法和装置。 系统包括源同步发射机和源同步接收机。 源同步发射机包括第一可扫描触发器，其具有耦合到源同步接收器中的第二可扫描触发器的数据输入的输出。 在转换测试期间，源同步发射机被配置为将数据从第一可扫描触发器发送到第二可扫描触发器，以及以操作时钟速度的时钟信号。 第一可扫描触发器耦合到被配置为引起发送数据的转换的反馈电路。 第二个可扫描的触发器可以捕获所发送的数据。 捕获的数据可以随后用于确定是否由第二可扫描的翻转器检测到期望的转换。

公开(公告)号：US20150046763A1

公开(公告)日：2015-02-12

申请号：US13964463

申请日：2013-08-12

Applicant: Apple Inc.

Inventor： Samy R. Makar ,  Jianlin Yu ,  Ravi K. Ramaswami

IPC: G01R31/3177

CPC classification number: G01R31/318555

Abstract: An apparatus and method for controlling a test controller is disclosed. An apparatus includes test controllers of a first type configured to operate according to a first protocol and test controllers of a second type configured to operate according to a second protocol. A test controller of the second type may be associated with one of the test controllers of the first type, with the former controlling the latter. The test controllers of the second type may each control associated ones of the test controllers of the second type in parallel and independently of one another.

Abstract translation: 公开了一种用于控制测试控制器的装置和方法。 一种装置包括被配置为根据第一协议操作的第一类型的测试控制器和被配置为根据第二协议操作的第二类型的测试控制器。 第二类型的测试控制器可以与第一类型的测试控制器中的一个相关联，前者控制后者。 第二类型的测试控制器可以彼此并行并且彼此独立地控制第二类型的测试控制器中的相关联的测试控制器。