公开(公告)号：US11056404B1

公开(公告)日：2021-07-06

申请号：US16719856

申请日：2019-12-18

Applicant: APPLIED MATERIALS ISRAEL LTD.

Inventor： Roman Kris ,  Grigory Klebanov ,  Dhananjay Singh Rathore ,  Einat Frishman ,  Sharon Duvdevani-Bar ,  Assaf Shamir ,  Elad Sommer ,  Jannelle Anna Geva ,  Daniel Alan Rogers ,  Ido Friedler ,  Avi Aviad Ben Simhon

IPC: G06T7/00 ,  H01L21/66

Abstract: An evaluation system that may include an imager; and a processing circuit. The imager may be configured to obtain an electron image of a hole that is formed by an etch process, the hole exposes at least one layer of a one or more sets of layers, each set of layers comprises layers that differ from each other by their electron yield and belong to an intermediate product. The processing circuit may be configured to evaluate, based on the electron image, whether the hole ended at a target layer of the intermediate product. The intermediate product is manufactured by one or more manufacturing stages of a manufacturing process of a three dimensional NAND memory unit. The hole may exhibit a high aspect ratio, and has a width of a nanometric scale.

公开(公告)号：US20210193536A1

公开(公告)日：2021-06-24

申请号：US16719856

申请日：2019-12-18

Applicant: APPLIED MATERIALS ISRAEL LTD.

Inventor： Roman Kris ,  Grigory Klebanov ,  Dhananjay Singh Rathore ,  Einat Frishman ,  Sharon Duvdevani-Bar ,  Assaf Shamir ,  Elad Sommer ,  Jannelle Anna Geva ,  Daniel Alan Rogers ,  Ido Friedler ,  Avi Aviad Ben Simhon

IPC: H01L21/66 ,  G06T7/00

Abstract: An evaluation system that may include an imager; and a processing circuit. The imager may be configured to obtain an electron image of a hole that is formed by an etch process, the hole exposes at least one layer of a one or more sets of layers, each set of layers comprises layers that differ from each other by their electron yield and belong to an intermediate product. The processing circuit may be configured to evaluate, based on the electron image, whether the hole ended at a target layer of the intermediate product. The intermediate product is manufactured by one or more manufacturing stages of a manufacturing process of a three dimensional NAND memory unit. The hole may exhibit a high aspect ratio, and has a width of a nanometric scale.