公开(公告)号：US20170076419A1

公开(公告)日：2017-03-16

申请号：US15254079

申请日：2016-09-01

Applicant: ARM LIMITED

Inventor： Jakob Axel FRIES ,  Henrik Nils-Sture OLSSON ,  Oskar FLORDAL ,  Sharjeel SAEED

IPC: G06T1/20 ,  H04N19/426 ,  H04N19/44 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06T1/60 ,  H04N19/426 ,  H04N19/436

Abstract: An interface apparatus and method of operating the same are provided. The interface apparatus receives an uncompressed image data read request using a first addressing scheme at a first bus interface and transmits a compressed image data read request using a second addressing scheme from a second bus interface. Address translation circuitry translates between the first addressing scheme and the second addressing scheme. Decoding circuitry decodes a set of compressed image data received via the second bus interface to generate the set of uncompressed image data which is then transmitted via the first bus interface. The use of a second addressing scheme and image data compression is thus transparent to the source of the uncompressed image data read request, and the interface apparatus can therefore be used to connect devices which use different addressing schemes and image data formats, without either needing to be modified.

Abstract translation: 提供了一种操作该接口装置和方法。 接口装置在第一总线接口处使用第一寻址方案接收未压缩的图像数据读取请求，并且使用第二寻址方案从第二总线接口发送压缩图像数据读取请求。 地址转换电路在第一寻址方案和第二寻址方案之间转换。 解码电路解码经由第二总线接口接收的一组压缩图像数据，以生成一组未压缩图像数据，然后经由第一总线接口传送。 因此，使用第二寻址方案和图像数据压缩对于未压缩的图像数据读取请求的源是透明的，并且接口装置因此可以用于连接使用不同寻址方案和图像数据格式的设备，而不需要 被修改。

公开(公告)号：US20240012673A1

公开(公告)日：2024-01-11

申请号：US18251564

申请日：2021-11-04

Applicant: Arm Limited

Inventor： David Thomas GARBETT ,  Jussi Tuomas PENNALA ,  Henrik Nils-Sture OLSSON ,  Nicholas John Nelson MURPHY

IPC: G06F9/455 ,  G06F11/07

CPC classification number: G06F9/45558 ,  G06F11/0751 ,  G06F11/0721 ,  G06F2009/4557

Abstract: A data processing system (1) comprises a plurality of processing units (11) and a controller (30) operable to allocate processing units of the plurality of processing units into respective groups of the processing units, wherein each group of processing units comprises a set of one or more of the processing units of the plurality of processing units. The data processing system further comprises an arbiter (31, 32) for each group of processing units for controlling access by virtual machines (33, 34) that require processing operations to the processing units of the group of processing units that the arbiter has been allocated.

公开(公告)号：US20230410246A1

公开(公告)日：2023-12-21

申请号：US18251169

申请日：2021-11-04

Applicant: ARM LIMITED

Inventor： Jussi Tuomas PENNALA ,  Henrik Nils-Sture OLSSON ,  Richard BRAMLEY ,  Nicholas John Nelson MURPHY

IPC: G06T1/20

CPC classification number: G06T1/20 ,  G06T2200/28

Abstract: A data processing system that comprises plural processing units is disclosed. The system includes functional units, the functional units having different processing capacities. A set of one or more processing units can operate in combination with one of the functional units according to a processing capacity required for the set of one or more processing units.