公开(公告)号：US20150049563A1

公开(公告)日：2015-02-19

申请号：US13967879

申请日：2013-08-15

Applicant: ARM LIMITED

Inventor： Bikas MAITI ,  Yew Keong CHONG ,  Martin Jay KINKADE

IPC: G11C7/22

CPC classification number: G11C7/22 ,  G11C5/148 ,  G11C7/227 ,  G11C11/419

Abstract: A memory device includes an array of memory cells arranged as a plurality of rows and columns, a plurality of word lines, each word line being coupled to an associated row of memory cells, and a plurality of bit lines, each bit line being coupled to an associated column of memory cells. Access circuitry is coupled to the word lines and the bit lines in order to perform access operations in respect of selected memory cells within the array. Control circuitry controls operation of the access circuitry and includes self-timed path (STP) delay circuitry. The control circuitry employs the delay indication when controlling the access circuitry to perform said access operations. Voltage supply control circuitry switches the voltage supply to at least one portion of the STP delay circuitry between a peripheral voltage supply and an array voltage supply dependent on a control signal.

Abstract translation: 存储器件包括布置成多个行和列的存储器单元的阵列，多个字线，每个字线耦合到相关行的存储器单元，以及多个位线，每个位线耦合到 相关的存储单元列。 访问电路被耦合到字线和位线，以便对阵列内的所选存储单元执行访问操作。 控制电路控制接入电路的操作，并且包括自定时路径（STP）延迟电路。 控制电路在控制访问电路执行所述访问操作时采用延迟指示。 电压供应控制电路根据控制信号将外部电压源和阵列电压电源之间的电压供应切换到STP延迟电路的至少一部分。

公开(公告)号：US20140115554A1

公开(公告)日：2014-04-24

申请号：US14145157

申请日：2013-12-31

Applicant: ARM LIMITED

Inventor： Gus YEUNG ,  Martin Jay KINKADE ,  Marlin Wayne FREDERICK, JR.

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5068

Abstract: A method of generating a layout of an integrated circuit is disclosed, the layout incorporating both standard cells and at least one memory instance generated by a memory compiler to define a memory device of the integrated circuit. Input data is received specifying one or more properties of a desired memory instance. The memory compiler generates the desired memory instance based on the input data and using the specified memory architecture. A standard cell library is provided. The memory compiler references at least one property of the standard cell library in order to generate the desired memory instance. The layout is then generated by populating standard cell rows with standard cells selected from the standard cell library in order to provide the functional components required by the integrated circuit, and integrating into the layout the desired memory instance provided by the memory compiler.

Abstract translation: 公开了一种生成集成电路的布局的方法，该布局包括标准单元和由存储器编译器生成的至少一个存储器实例，以定义集成电路的存储器件。 接收指定所需存储器实例的一个或多个属性的输入数据。 内存编译器基于输入数据并使用指定的内存架构生成所需的内存实例。 提供了一个标准的细胞库。 内存编译器引用标准单元库的至少一个属性，以便生成所需的内存实例。 然后通过用从标准单元库中选择的标准单元格填充标准单元行来生成布局，以便提供集成电路所需的功能组件，并将由存储器编译器提供的所需存储器实例集成到布局中。