公开(公告)号：US10948963B2

公开(公告)日：2021-03-16

申请号：US16035884

申请日：2018-07-16

Applicant: ARM Limited

Inventor： Richard Andrew Paterson ,  Seow Chuan Lim ,  Alessandro Renzi

IPC: G06F1/28 ,  G06F1/3287 ,  G06F1/3209 ,  G06F11/30 ,  G06F1/3296

Abstract: An integrated circuit comprises first and second power domains, and a message handling unit to control passing of messages sent from a sender device in the first power domain to a receiver device in the second power domain. The message handling unit writes messages sent from the sender device to a message storage area, provided in the second power domain. The message handling unit is responsive to a message send request from the sender device requesting sending of at least one message to the receiver device when at least one device in the second power domain is in a quiescent state, to transmit a wakeup request to a second domain power controller to request that said at least one device in the second power domain transitions from the quiescent state to an awake state.

公开(公告)号：US11030065B2

公开(公告)日：2021-06-08

申请号：US16190335

申请日：2018-11-14

Applicant: Arm Limited

Inventor： Kar-Lik Kasim Wong ,  Alessandro Renzi ,  Michael Weiner ,  Avi Shif ,  Oded Golombek

IPC: G06F11/277 ,  G06F7/58 ,  H04L9/00

Abstract: Aspects of the present disclosure relate to an apparatus comprising analogue circuitry comprising an entropy source, the entropy source being configured to provide a random output. The apparatus comprises first digital circuitry to receive the output of the entropy source and, based on said output, generate random numbers, and second digital circuitry to receive the output of the entropy source and, based on said output, generate random numbers, the second digital circuitry being a duplicate of the first digital circuitry. The apparatus comprises difference detection circuitry to determine a difference of operation between the first digital circuitry and the second digital circuitry. Each of the first digital circuitry and the second digital circuitry comprises entropy checking circuitry to check the entropy of the output of the entropy source.