公开(公告)号：US10552152B2

公开(公告)日：2020-02-04

申请号：US15166444

申请日：2016-05-27

Applicant: ARM Limited

Inventor： Jonathan Curtis Beard ,  Wendy Elsasser ,  Eric Van Hensbergen ,  Stephan Diestelhorst

IPC: G06F9/30 ,  G06F12/084 ,  G06F12/0811 ,  G06F9/38 ,  G06F12/0875 ,  G06F12/0897

Abstract: A data processing apparatus, and method of operation thereof, for executing instructions. The apparatus includes one or more host processors, each having a first processing unit, and a multi-level memory system. One or more levels of the memory system are tightly coupled to a corresponding second processing unit. At least one of the host processors includes an instruction scheduler that routes instructions selectively to at least one of the first and second processing units, dependent upon the availability of the processing units and the location, within the memory system, of data to be used when executing the instructions.

公开(公告)号：US20240160508A1

公开(公告)日：2024-05-16

申请号：US18054397

申请日：2022-11-10

Applicant: Arm Limited

Inventor： Eric Van Hensbergen ,  Joshua Stephan Minor ,  Alexandre Peixoto Ferreira

IPC: G06F9/54 ,  G06N20/00

CPC classification number: G06F9/547 ,  G06N20/00

Abstract: The present disclosure relates generally to systems, devices and/or processes for sharing machine learning models among components of a computing environment.

公开(公告)号：US20240160452A1

公开(公告)日：2024-05-16

申请号：US18080531

申请日：2022-12-13

Applicant: Arm Limited

Inventor： Eric Van Hensbergen ,  Vasileios Laganakos ,  Pavel Shamis ,  Luis Emilio Pena

IPC: G06F9/445

CPC classification number: G06F9/44521

Abstract: The present disclosure relates generally to systems, devices and/or processes for runtime linking of software component function implementations, and relates more particularly to linking particular function implementations based at least in part on a current execution environment.