公开(公告)号：US20190066770A1

公开(公告)日：2019-02-28

申请号：US15684255

申请日：2017-08-23

申请人： ARM Limited

发明人： Rajiv Kumar Sisodia ,  Navin Agarwal ,  Shri Sagar Dwivedi ,  Jitendra Dasani ,  Fakhruddin Ali Bohra ,  Lalit Gupta ,  Daksheshkumar Maganbhai Malaviya

IPC分类号： G11C11/419

摘要： Various implementations described herein are directed to an integrated circuit. The integrated circuit may include read circuitry coupled to bitlines, and the read circuitry may be activated based on a read select signal to perform a read operation on the bitlines. The integrated circuit may include write circuitry coupled to the bitlines, and the write circuitry may be activated based on a write select signal to perform a write operation on the bitlines. The integrated circuit may include bitline discharge control circuitry coupled to the bitlines and the write circuitry, and the bitline discharge control circuitry may control the bitline discharge of the bitlines during the read operation so as to restrict a false read on the bitlines by providing a discharge boundary for the bitlines during the read operation.

公开(公告)号：US10734065B2

公开(公告)日：2020-08-04

申请号：US15684255

申请日：2017-08-23

申请人： ARM Limited

发明人： Rajiv Kumar Sisodia ,  Navin Agarwal ,  Shri Sagar Dwivedi ,  Jitendra Dasani ,  Fakhruddin Ali Bohra ,  Lalit Gupta ,  Daksheshkumar Maganbhai Malaviya

IPC分类号： G11C11/419 ,  G11C7/12 ,  G11C8/16

摘要： Various implementations described herein are directed to an integrated circuit. The integrated circuit may include read circuitry coupled to bitlines, and the read circuitry may be activated based on a read select signal to perform a read operation on the bitlines. The integrated circuit may include write circuitry coupled to the bitlines, and the write circuitry may be activated based on a write select signal to perform a write operation on the bitlines. The integrated circuit may include bitline discharge control circuitry coupled to the bitlines and the write circuitry, and the bitline discharge control circuitry may control the bitline discharge of the bitlines during the read operation so as to restrict a false read on the bitlines by providing a discharge boundary for the bitlines during the read operation.