公开(公告)号：US12093111B2

公开(公告)日：2024-09-17

申请号：US17965782

申请日：2022-10-14

Applicant: ASUSTeK COMPUTER INC.

Inventor： Po-Han Cheng ,  Chin-Chang Chang ,  Po-Hsin Chang ,  Shih-Hao Chen ,  Kai-Peng Chung ,  Ci-Syuan Wu ,  Chun Tsao ,  Teng-Chih Wang ,  Sheng-Yi Chen ,  Guan-Heng Lai

IPC: G06F1/3234 ,  G06F1/26 ,  G06F1/3212

CPC classification number: G06F1/3243 ,  G06F1/263 ,  G06F1/3212

Abstract: An electronic device and a performance optimization method thereof are provided. The electronic device includes a battery module, a processor, and a controller. The battery module is configured to supply power to the electronic device. The processor has a power limit. The controller is configured to monitor a charging and discharging current of the battery module. In a power connection mode, the controller analyzes a status of the battery module and adjusts the power limit of the processor according to the charging and discharging current.

公开(公告)号：US20240288919A1

公开(公告)日：2024-08-29

申请号：US18511966

申请日：2023-11-16

Applicant: ASUSTeK COMPUTER INC.

Inventor： I-Liang Chiu ,  Zong-Yin Chen ,  Teng-Chih Wang ,  Guan-Heng Lai

IPC: G06F1/26 ,  G06F9/445

CPC classification number: G06F1/263 ,  G06F9/44536

Abstract: An electronic device and a power switching control method are provided. The electronic device includes a basic input/output system (BIOS), an embedded controller, and a control chip. The BIOS is configured to generate a first handshake command when executing an update mode. The embedded controller is coupled to the BIOS and includes a general-purpose input-output (GPIO) pin. The embedded controller performs a handshake procedure with the BIOS according to the first handshake command, and determines a voltage level of the GPIO pin according to the first handshake command. The control chip is coupled to the GPIO pin of the embedded controller, and is configured to determine a power switching waiting time of a power switching unit according to the voltage level of the GPIO pin.

公开(公告)号：US20230266813A1

公开(公告)日：2023-08-24

申请号：US17965782

申请日：2022-10-14

Applicant: ASUSTeK COMPUTER INC.

Inventor： Po-Han Cheng ,  Chin-Chang Chang ,  Po-Hsin Chang ,  Shih-Hao Chen ,  Kai-Peng Chung ,  Ci-Syuan Wu ,  Chun Tsao ,  Teng-Chih Wang ,  Sheng-Yi Chen ,  Guan-Heng Lai

IPC: G06F1/3234 ,  G06F1/26 ,  G06F1/3212

CPC classification number: G06F1/3243 ,  G06F1/263 ,  G06F1/3212

Abstract: An electronic device and a performance optimization method thereof are provided. The electronic device includes a battery module, a processor, and a controller. The battery module is configured to supply power to the electronic device. The processor has a power limit. The controller is configured to monitor a charging and discharging current of the battery module. In a power connection mode, the controller analyzes a status of the battery module and adjusts the power limit of the processor according to the charging and discharging current.