公开(公告)号：US11568248B2

公开(公告)日：2023-01-31

申请号：US16836785

申请日：2020-03-31

Applicant: ATI Technologies ULC

Inventor： Arash Hariri ,  Mehdi Saeedi ,  Boris Ivanovic ,  Gabor Sines

IPC: G06K9/62 ,  G06N3/08 ,  H03M7/32 ,  G06N20/10

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a similarity of the feature maps relative to each other and store the plurality of different feature maps in the memory.

公开(公告)号：US10511858B2

公开(公告)日：2019-12-17

申请号：US15209194

申请日：2016-07-13

Applicant: ATI TECHNOLOGIES ULC

Inventor： Mehdi Saeedi ,  Khaled Mammou ,  Arash Hariri ,  Gabor Sines ,  Lei Zhang

IPC: H04N19/59 ,  H04N19/184 ,  H04N19/182 ,  H04N19/186 ,  H04N19/176 ,  H04N19/593 ,  H04N19/91

Abstract: A compressor is configured to determine delta color compression values for a plurality of pixels in a block and subdivide the plurality of pixels in the block into a plurality of groups and transmit a compressed bitstream representative of the delta values. The compressed bitstream includes bits representative of a block header that indicates a range of numbers of bits that are sufficient to represent the delta values, a plurality of group headers that each indicate a group minimum number of bits that is sufficient to represent the delta values in a corresponding one of the plurality of groups, and the delta values encoded using the group minimum number of bits for the group that includes the delta values. A decompressor configured to decompress the compressed bitstream based on the block header, the plurality of group headers, and the encoded delta values.

公开(公告)号：US20210303993A1

公开(公告)日：2021-09-30

申请号：US16836741

申请日：2020-03-31

Applicant: ATI Technologies ULC

Inventor： Mehdi Saeedi ,  Arash Hariri ,  Gabor Sines

IPC: G06N3/08 ,  G06N20/00 ,  H03M7/46 ,  H03M7/30

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a sparsity of the feature maps and store the plurality of different feature maps in the memory.

公开(公告)号：US20180020232A1

公开(公告)日：2018-01-18

申请号：US15209194

申请日：2016-07-13

Applicant: ATI TECHNOLOGIES ULC

Inventor： Mehdi Saeedi ,  Khaled Mammou ,  Arash Hariri ,  Gabor Sines ,  Lei Zhang

IPC: H04N19/59 ,  H04N19/184 ,  H04N19/182 ,  H04N19/186 ,  H04N19/176

Abstract: A compressor is configured to determine delta color compression values for a plurality of pixels in a block and subdivide the plurality of pixels in the block into a plurality of groups and transmit a compressed bitstream representative of the delta values. The compressed bitstream includes bits representative of a block header that indicates a range of numbers of bits that are sufficient to represent the delta values, a plurality of group headers that each indicate a group minimum number of bits that is sufficient to represent the delta values in a corresponding one of the plurality of groups, and the delta values encoded using the group minimum number of bits for the group that includes the delta values. A decompressor configured to decompress the compressed bitstream based on the block header, the plurality of group headers, and the encoded delta values.

公开(公告)号：US11551089B2

公开(公告)日：2023-01-10

申请号：US16836741

申请日：2020-03-31

Applicant: ATI Technologies ULC

Inventor： Mehdi Saeedi ,  Arash Hariri ,  Gabor Sines

IPC: G06N3/08 ,  H03M7/30 ,  H03M7/46 ,  G06N20/00

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a sparsity of the feature maps and store the plurality of different feature maps in the memory.

公开(公告)号：US20210303994A1

公开(公告)日：2021-09-30

申请号：US16836785

申请日：2020-03-31

Applicant: ATI Technologies ULC

Inventor： Arash Hariri ,  Mehdi Saeedi ,  Boris Ivanovic ,  Gabor Sines

IPC: G06N3/08 ,  G06N20/10 ,  G06K9/62 ,  H03M7/32

Abstract: A processing device for executing a machine learning neural network operation includes memory and a processor. The processor is configured to receive input data at a layer of the machine learning neural network operation, receive a plurality of sorted filters to be applied to the input data, apply the plurality of sorted filters to the input data to produce a plurality of different feature maps, compress the plurality of different feature maps according to a similarity of the feature maps relative to each other and store the plurality of different feature maps in the memory.