公开(公告)号：US20220222770A1

公开(公告)日：2022-07-14

申请号：US17708500

申请日：2022-03-30

Applicant: ATI Technologies ULC

Inventor： Stephen L. MOREIN ,  Laurent LEFEBVRE ,  Andrew E. GRUBER ,  Andi SKENDE

IPC: G06T1/20 ,  G06T15/80 ,  G06T15/00

Abstract: A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data by a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed by the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available.

公开(公告)号：US20210233205A1

公开(公告)日：2021-07-29

申请号：US17230129

申请日：2021-04-14

Applicant: ATI Technologies ULC

Inventor： Stephen L. MOREIN ,  Laurent LEFEBVRE ,  Andrew E. GRUBER ,  Andi SKENDE

IPC: G06T1/20 ,  G06T15/80 ,  G06T15/00

Abstract: A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data by a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed by the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available.