公开(公告)号：US07053624B2

公开(公告)日：2006-05-30

申请号：US10875017

申请日：2004-06-23

申请人： Aaron C. Klijn ,  Marvin G. Miller ,  John L. Shanks ,  Stanley I. Thompson

发明人： Aaron C. Klijn ,  Marvin G. Miller ,  John L. Shanks ,  Stanley I. Thompson

IPC分类号： G01R31/327

CPC分类号： G01R31/3278

摘要： A system for testing a relay is provided. The system includes a plurality of signal generators to generate signals to test relays. The system includes a controller to provide at least some inputs for use by at least one of the signal generators to generate the signals. The system also includes a hand-held controller in communication with the controller. The hand-held controller is operable to receive and display relay test information for a user. The hand-held controller is operable to transmit one or more control inputs for testing the relay.

摘要翻译： 提供了一种用于测试继电器的系统。 该系统包括多个信号发生器以产生测试继电器的信号。 该系统包括控制器，用于提供至少一些输入以供至少一个信号发生器使用以产生信号。 该系统还包括与控制器通信的手持式控制器。 手持控制器可操作以接收和显示用户的中继测试信息。 手持控制器可操作地传送用于测试继电器的一个或多个控制输入。

公开(公告)号：US07415377B2

公开(公告)日：2008-08-19

申请号：US11776347

申请日：2007-07-11

申请人： Aaron C. Klijn ,  Marvin G. Miller ,  Francisco J. Pataro ,  Michael D. Willett ,  Michael Edwards ,  Terry L. Elzy ,  Michael Maahs ,  John L. Shanks ,  Stanley I. Thompson

发明人： Aaron C. Klijn ,  Marvin G. Miller ,  Francisco J. Pataro ,  Michael D. Willett ,  Michael Edwards ,  Terry L. Elzy ,  Michael Maahs ,  John L. Shanks ,  Stanley I. Thompson

IPC分类号： G06F19/00

CPC分类号： G01R31/3272 ,  Y10T307/25

摘要： A programmable system for testing relays and controlling systems is provided. In one embodiment the present disclosure provides a programmable device capable of, for example, testing relays. The device includes a signal generator for generating signals to test relays. The device includes a memory location, and a first program stored in the memory location. The first program supports relay testing. The device includes a versioned program to support relay testing, and a processor in communication with the signal generator and the memory location. The device also includes a routine that is operable by the processor to install a versioned program in the memory location replacing the first program.

摘要翻译： 提供了一种用于测试继电器和控制系统的可编程系统。 在一个实施例中，本公开提供了一种能够例如测试继电器的可编程设备。 该装置包括用于产生信号以测试继电器的信号发生器。 该设备包括存储器位置和存储在存储器位置中的第一程序。 第一个程序支持继电器测试。 该装置包括用于支持中继测试的版本化程序，以及与信号发生器和存储器位置通信的处理器。 该设备还包括可由处理器操作的例程，以将替换第一程序的版本化程序安装在存储器位置中。

公开(公告)号：US4054947A

公开(公告)日：1977-10-18

申请号：US595960

申请日：1975-07-14

申请人： John L. Shanks ,  Everett L. Cox ,  John W. Supernaw

发明人： John L. Shanks ,  Everett L. Cox ,  John W. Supernaw

IPC分类号： G06F3/06 ,  D05B19/00 ,  G11B20/10 ,  G11B20/12 ,  G06K19/08

CPC分类号： G11B20/1205 ,  G11B2020/1087 ,  G11B2020/10879 ,  G11B2220/90

摘要： An interface for coupling a computer to a plurality of magnetic tape transports, including dual-density transports and combinations of high and low density transports. The interface includes an automatic density selector for detecting the density of data stored on a tape prior to reading and for storing this information for as long as the tape is being used. A read-only memory and other logic circuitry translate computer operating commands into commands readable by a transport formatter. The interface also couples digital data between the computer and the formatter and converts formatter status information into language readable by the computer.

摘要翻译： 一种用于将计算机耦合到多个磁带传输器的接口，包括双重密度传输以及高密度和低密度传输的组合。 该接口包括一个自动浓度选择器，用于在读取之前检测存储在磁带上的数据的密度，并且只要磁带被使用就存储该信息。 只读存储器和其他逻辑电路将计算机操作命令转换为可由传输格式化器读取的命令。 该接口还将计算机和格式化器之间的数字数据耦合，并将格式化器状态信息转换为计算机可读的语言。

公开(公告)号：US4032915A

公开(公告)日：1977-06-28

申请号：US598314

申请日：1975-07-23

申请人： John L. Shanks ,  Randol R. Read ,  John W. Supernaw

发明人： John L. Shanks ,  Randol R. Read ,  John W. Supernaw

IPC分类号： H03M5/08 ,  G11B20/14 ,  H03K5/153 ,  H04L25/49 ,  H04L3/00

CPC分类号： G11B20/1411

摘要： This disclosure describes a decoding system for decoding and formatting digital data recorded on magnetic tape in the STR ("speed-tolerant recording") format. The digital words are stored in cells of about equal width except that the leading cell of each word, called a "sync" cell, is of double width. Each cell starts with a positive pulse, and a cell detector provides a signal each time this occurs. The apparatus includes a data detector, which analyzes the width of this positive pulse relative to the cell width to determine whether the cell is a 1 bit or a 0 bit. Since the measurement is relative, cell length, i.e., total cell time, is not important. The bit determination is loaded into a shift register. Other apparatus determines the width of the cell, so that a sync cell detector can determine whether a sync cell is present or not. When a sync cell is detected, a pulse is generated which actuates the output buffer register to load the bits from the shift register. Data flows from buffer to a computer.