公开(公告)号：US6026222A

公开(公告)日：2000-02-15

申请号：US997551

申请日：1997-12-23

申请人： Aarti Gupta ,  Pranav N Ashar

发明人： Aarti Gupta ,  Pranav N Ashar

IPC分类号： H01L21/822 ,  G06F17/50 ,  H01L21/66 ,  H01L27/04

CPC分类号： G06F17/504

摘要： A computer system, computer program product, and method for solving a combinational logic verification problem with respect to two combinational circuits includes Boolean SAT checking integrated with binary decision diagrams (BDD) use. A fanout partition of a miter circuit formed from the two combinational circuits is reduced to BDD form, while the fanin partition is represented by SAT clauses. As SAT solutions are evaluated, variables in the cutset between the fanout and fanin partitions are assigned values. In a preferred embodiment, each assignment to a cutset variable is checked against an onset of the BDD prior to continuing with SAT solution seeking.

摘要翻译： 一种计算机系统，计算机程序产品和用于解决两个组合电路组合逻辑验证问题的方法，包括与二进制决策图（BDD）使用集成的布尔SAT检查。 由两个组合电路形成的斜角电路的扇出分区减少为BDD形式，而扇形分区由SAT子句表示。 在评估SAT解决方案时，扇出分区和扇区分区之间的变量将分配值。 在优选实施例中，在继续SAT求解之前，针对BDD的开始来检查对切片变量的每个分配。

公开(公告)号：US6035109A

公开(公告)日：2000-03-07

申请号：US847952

申请日：1997-04-22

申请人： Pranav N Ashar ,  Aarti Gupta ,  Sharad Malik

发明人： Pranav N Ashar ,  Aarti Gupta ,  Sharad Malik

IPC分类号： G06F17/50 ,  G06F17/00

CPC分类号： G06F17/504

摘要： The Complete-1-Distinguishability (C-1-D) property is used for simplifying FSM verification. This property eliminates the need for a traversal of the product machine for the implementation machine and the specification machine. Instead, a much simpler check suffices. This check consists of first obtaining a 1-equivalence mapping between the states of the two machines, and then checking that it is a bisimulation relation. The C-1-D property can be used directly on specifications for which it naturally holds. This property can be enforced on arbitrary FSMs by exposing some of the latch outputs as pseudo-primary outputs during synthesis and verification. In this sense, the synthesis/verification methodology provides another point in the tradeoff curve between constraints-on-synthesis versus complexity-of-verification.

摘要翻译： 完整的1分辨率（C-1-D）属性用于简化FSM验证。 该特性不需要对实施机器和规格机器的产品机器进行遍历。 相反，一个更简单的检查就足够了。 该检查包括首先在两台机器的状态之间获得1等效映射，然后检查它是否是双向关系。 C-1-D属性可以直接用于其自然拥有的规格。 通过在合成和验证期间将某些锁存输出作为伪主输出，可以在任意的FSM上强制实现该属性。 在这个意义上，综合/验证方法在合成约束与验证复杂度之间的权衡曲线中提供了另一个要点。