公开(公告)号：US11467838B2

公开(公告)日：2022-10-11

申请号：US15986626

申请日：2018-05-22

Applicant: Advanced Micro Devices, Inc.

Inventor： Kai Troester ,  Magiting Talisayon ,  Hongwen Gao ,  Benjamin Floering ,  Emil Talpes

IPC: G06F9/30

Abstract: Systems, apparatuses, and methods for implementing a fastpath microcode sequencer are disclosed. A processor includes at least an instruction decode unit and first and second microcode units. For each received instruction, the instruction decode unit forwards the instruction to the first microcode unit if the instruction satisfies at least a first condition. In one implementation, the first condition is the instruction being classified as a frequently executed instruction. If a received instruction satisfies at least a second condition, the instruction decode unit forwards the received instruction to a second microcode unit. In one implementation, the first microcode unit is a smaller, faster structure than the second microcode unit. In one implementation, the second condition is the instruction being classified as an infrequently executed instruction. In other implementations, the instruction decode unit forwards the instruction to another microcode unit responsive to determining the instruction satisfies one or more other conditions.