公开(公告)号：US20250004730A1

公开(公告)日：2025-01-02

申请号：US18342347

申请日：2023-06-27

Applicant: Advanced Micro Devices, Inc.

Inventor： Emily Anne Furst ,  Robin Conradine Knauerhase ,  Sangeeta Chowdhary ,  Michael L. Chu

IPC: G06F8/41

Abstract: Selecting intermediate representation transformation for compilations is described. In accordance with the described techniques, source code is received to be compiled by a compilation system for execution by a processor of hardware. Intermediate representation transformations are selected for the source code based on system load information associated with the hardware. The intermediate representation transformations are output to the compilation system.

公开(公告)号：US20240272791A1

公开(公告)日：2024-08-15

申请号：US18108653

申请日：2023-02-12

Applicant: Advanced Micro Devices, Inc.

Inventor： Benjamin Youngjae Cho ,  Armand Bahram Behroozi ,  Michael L. Chu ,  Emily Anne Furst

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0629 ,  G06F3/0671 ,  G06F9/4881 ,  G06F9/5016 ,  G06F9/5066

Abstract: Automatic generation of data layout instructions for locating data objects in memory that are involved in a sequence of operations for a computational task is described. In accordance with the described techniques, an interference graph is generated for the sequence of operations, where individual nodes in the interference graph represent data objects involved in the computational task. The interference graph includes edges connecting different pairs of nodes, such that an edge indicates the connected data objects are involved in a common operation of the sequence of operations. Weights are assigned to edges based on architectural characteristics of a system performing the computational task as well as a size of the data objects connected by an edge. Individual data objects are then assigned to locations in memory based on edge weights of edges connected to a node representing the data object, optimizing system performance during the computational task.