公开(公告)号：US20230195627A1

公开(公告)日：2023-06-22

申请号：US17558393

申请日：2021-12-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Mei Ye

IPC: G06F12/0806

CPC classification number: G06F12/0806 ,  G06F2212/1016

Abstract: An electronic device that handles memory accesses includes a memory and a processor that supports a plurality of streams. The processor acquires a graph that includes paths of operations in a set of operations for processing instances of data through a model, each path of operations including a separate sequence of operations from the set of operations that is to be executed using a respective stream from among the plurality of streams. The processor then identifies concurrent paths in the graph, the concurrent paths being paths of operations between split points at which two or more paths of operations diverge and merge points at which the two or more paths of operations merge. The processor next executes operations in each of the concurrent paths using a respective stream, the executing including using memory coloring for handling memory accesses in the memory for the operations in each concurrent path.

公开(公告)号：US11687456B1

公开(公告)日：2023-06-27

申请号：US17558393

申请日：2021-12-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Mei Ye

IPC: G06F12/0806

CPC classification number: G06F12/0806 ,  G06F2212/1016

Abstract: An electronic device that handles memory accesses includes a memory and a processor that supports a plurality of streams. The processor acquires a graph that includes paths of operations in a set of operations for processing instances of data through a model, each path of operations including a separate sequence of operations from the set of operations that is to be executed using a respective stream from among the plurality of streams. The processor then identifies concurrent paths in the graph, the concurrent paths being paths of operations between split points at which two or more paths of operations diverge and merge points at which the two or more paths of operations merge. The processor next executes operations in each of the concurrent paths using a respective stream, the executing including using memory coloring for handling memory accesses in the memory for the operations in each concurrent path.