公开(公告)号：US20240004664A1

公开(公告)日：2024-01-04

申请号：US17855727

申请日：2022-06-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Sree Harsha Kosuru ,  Eric Dixon ,  Erik Swanson ,  Michael Estlick ,  Patrick Michael Lowry

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/384 ,  G06F9/30123

Abstract: The disclosed system may include a processor configured to detect that a data unit size for an instruction is smaller than a register. The processor may allocate a first portion of the register to the instruction in a manner that leaves a second portion of the register available for allocating to an additional instruction. The processor may also track the register as a split register. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US12229563B2

公开(公告)日：2025-02-18

申请号：US17855727

申请日：2022-06-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Sree Harsha Kosuru ,  Eric Dixon ,  Erik Swanson ,  Michael Estlick ,  Patrick Michael Lowry

IPC: G06F9/30 ,  G06F9/38

Abstract: The disclosed system may include a processor configured to detect that a data unit size for an instruction is smaller than a register. The processor may allocate a first portion of the register to the instruction in a manner that leaves a second portion of the register available for allocating to an additional instruction. The processor may also track the register as a split register. Various other methods, systems, and computer-readable media are also disclosed.