SHIFT OF CIRCUIT PERIPHERY LAYOUT TO LEVERAGE OPTIMAL USE OF AVAILABLE METAL TRACKS IN PERIPHERY LOGIC

    公开(公告)号:US20190034572A1

    公开(公告)日:2019-01-31

    申请号:US15663132

    申请日:2017-07-28

    Abstract: Systems, apparatuses, and methods for efficiently floor planning a semiconductor chip are disclosed. Within either the processor or the memory of a computing system, each of a first block and a neighboring second block has a same height. A first metal track plan for the first block is unaligned with respect to a second metal track plan for the second block. An offset for moving each track of the second metal plan to align with a track of the first metal track plan is determined where the offset is a fraction of the height. The placement of the second block is shifted by the offset with respect to the first block. The shifted placement of the second block allows the first metal track plan for the first block to use a unidirectional pattern across the first block and the second block.

    Shift of circuit periphery layout to leverage optimal use of available metal tracks in periphery logic

    公开(公告)号:US10747931B2

    公开(公告)日:2020-08-18

    申请号:US15663132

    申请日:2017-07-28

    Abstract: Systems, apparatuses, and methods for efficiently floor planning a semiconductor chip are disclosed. Within either the processor or the memory of a computing system, each of a first block and a neighboring second block has a same height. A first metal track plan for the first block is unaligned with respect to a second metal track plan for the second block. An offset for moving each track of the second metal plan to align with a track of the first metal track plan is determined where the offset is a fraction of the height. The placement of the second block is shifted by the offset with respect to the first block. The shifted placement of the second block allows the first metal track plan for the first block to use a unidirectional pattern across the first block and the second block.

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