公开(公告)号：US10223124B2

公开(公告)日：2019-03-05

申请号：US13739161

申请日：2013-01-11

Applicant: Advanced Micro Devices, Inc.

Inventor： Ramkumar Jayaseelan ,  Ravindra N Bhargava

IPC: G06F9/00 ,  G06F9/38

Abstract: A processor employs one or more branch predictors to issue branch predictions for each thread executing at an instruction pipeline. Based on the branch predictions, the processor determines a branch prediction confidence for each of the executing threads, whereby a lower confidence level indicates a smaller likelihood that the corresponding thread will actually take the predicted branch. Because speculative execution of an untaken branch wastes resources of the instruction pipeline, the processor prioritizes threads associated with a higher confidence level for selection at the stages of the instruction pipeline.