公开(公告)号：US11221772B2

公开(公告)日：2022-01-11

申请号：US16241716

申请日：2019-01-07

Applicant: Advanced Micro Devices, Inc.

Inventor： Kevin M. Brandl ,  Thomas H. Hamilton

IPC: G06F3/06 ,  G11C5/14 ,  G11C11/34 ,  G11C11/406 ,  G11C11/4074 ,  G11C29/04

Abstract: A system includes a memory system comprising a memory module and a processor adapted to access the memory module using a memory controller that includes a controller having an input for receiving a power state change request signal and an output for providing memory operations, and a memory operation array comprising a plurality of entries. Each entry includes a plurality of encoded fields. The memory operation array is programmable to store different sequences of commands for particular types of memory of a plurality of types of memory in the plurality of entries that initiate entry into and exit from supported low power modes for the particular types of memory. The controller is responsive to an activation of the power state change request signal to access the memory operation array to fetch at least one entry, and to issue at least one memory operation indicated by the at least one entry.