公开(公告)号：US11687460B2

公开(公告)日：2023-06-27

申请号：US15498076

申请日：2017-04-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Michael W. LeBeane ,  Walter B. Benton ,  Vinay Agarwala

IPC: G06F12/0817 ,  G06F12/1081 ,  G06F12/0831 ,  G06F12/0813 ,  G06F13/28

CPC classification number: G06F12/0828 ,  G06F12/0813 ,  G06F12/0831 ,  G06F12/1081 ,  G06F13/28 ,  G06F2212/1021 ,  G06F2212/154 ,  G06F2212/621 ,  G06F2212/622

Abstract: Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.

公开(公告)号：US20180314638A1

公开(公告)日：2018-11-01

申请号：US15498076

申请日：2017-04-26

Applicant: Advanced Micro Devices, Inc.

Inventor： Michael W. LeBeane ,  Walter B. Benton ,  Vinay Agarwala

IPC: G06F12/0817 ,  G06F12/1081 ,  G06F12/0831

Abstract: Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.