公开(公告)号：US20250044966A1

公开(公告)日：2025-02-06

申请号：US18362796

申请日：2023-07-31

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Nicholas Carmine DeFiore ,  Sridhar Varadharajulu Gada ,  James R. Magro ,  Michael L. Choate ,  Wayne Paul Rodrigue ,  NrusimhaVamsi Krishna Godavarti ,  Robert Gentile ,  Roozbeh Paribakht ,  Anwar Kashem

IPC: G06F3/06

Abstract: The disclosed device includes a cache that stores sets of settings for memory states, and registers that store a current set of settings for a memory. The device also includes a control circuit that can read, from the cache in response to the memory transitioning to a new memory state, a new set of settings corresponding to the new memory state, and write, to the plurality of registers, the new set of settings. Various other methods, systems, and computer-readable media are also disclosed.