公开(公告)号：US20250103360A1

公开(公告)日：2025-03-27

申请号：US18472007

申请日：2023-09-21

Applicant: Advanced Micro Devices, Inc. ,  Xilinx, Inc.

Inventor： Ananta S. Pallapothu ,  Raghukul Bhushan Dikshit

IPC: G06F9/455

Abstract: A circuit design emulation system having a plurality of integrated circuits (ICs) includes a first IC. The first IC includes an originator circuit configured to issue a request of a transaction directed to a completer circuit. The request is specified in a communication protocol. The first IC includes a completer transactor circuit coupled to the originator circuit and configured to translate the request into request data. The first IC includes a first interface circuit configured to synchronize the request data from an originator clock domain to a transceiver clock domain operating at a higher frequency than the originator clock domain. The first IC includes a first transceiver circuit configured to convey the request data over a communication link that operates asynchronously to the originator clock domain.