公开(公告)号：US11973048B2

公开(公告)日：2024-04-30

申请号：US17521786

申请日：2021-11-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： An-Nong Wen ,  Ching-Han Huang ,  Ching-Ho Chang

IPC: H01L23/48 ,  B81B7/00 ,  B81C3/00 ,  H01L23/00

CPC classification number: H01L24/17 ,  B81B7/007 ,  B81C3/001 ,  H01L24/11 ,  H01L24/16 ,  B81B2207/012 ,  B81B2207/098 ,  B81C2203/035 ,  B81C2203/0792 ,  H01L2224/11462 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/16145 ,  H01L2224/1703 ,  H01L2224/17517 ,  H01L2924/1433 ,  H01L2924/1461

Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

公开(公告)号：US11171108B2

公开(公告)日：2021-11-09

申请号：US16592683

申请日：2019-10-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： An-Nong Wen ,  Ching-Han Huang ,  Ching-Ho Chang

IPC: H01L21/00 ,  H01L23/00 ,  B81B7/00 ,  B81C3/00

Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

公开(公告)号：US11133278B2

公开(公告)日：2021-09-28

申请号：US16583006

申请日：2019-09-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Che Huang ,  Ching-Han Huang ,  An-Nong Wen ,  Po-Ming Huang

IPC: H01L23/00 ,  H01L21/768

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.