公开(公告)号：US20220115328A1

公开(公告)日：2022-04-14

申请号：US17066408

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stephan ESSIG

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic package and manufacturing method thereof are provided. The electronic package includes a substrate, a first encapsulant, a wettable flank and a shielding layer. The substrate includes a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface. The first encapsulant is disposed on the first surface of the substrate. The wettable flank is exposed from the side surface of the substrate. The shielding layer covers a side surface of the first encapsulant, wherein on the side surface of the substrate, the shielding layer is spaced apart from the wettable flank.

公开(公告)号：US20220115310A1

公开(公告)日：2022-04-14

申请号：US17066411

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stephan ESSIG

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: An electronic package and method for manufacturing the same are provided. The electronic package includes a substrate and a wetting layer. The substrate includes a plurality of conductive step structures each including a first portion and a second portion. The first portion has a first bottom surface, a first outer surface and a first inner surface. The second portion has a second bottom surface, a second outer surface and a second inner surface, wherein the second portion partially exposes the first bottom surface. The wetting layer at least covers the second bottom surface, the second outer surface and the second inner surface of the second portion of each of the conductive step structures.