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公开(公告)号：US10551344B2
公开(公告)日：2020-02-04
申请号：US15557458
申请日：2016-03-11
Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
Inventor： Yoshio Nishida
IPC: G01N27/416
Abstract: A method and devices for controlling a potentiostat control loop circuit to provide an accurate cell voltage for electrochemically sensing a sample, wherein the cell voltage corresponds to a difference between electrode voltages a working electrode and a reference electrode of a three-electrode potentiostat are provided. The devices include a potentiostat control loop circuit having a first amplifier with an output connected to a counter electrode of the three electrode potentiostat and a first input connected to a first potential and a first switched capacitor network including a first capacitance device having a first electrode connected to a second input of the first amplifier. The first switched capacitor network is also operatively connected to the first amplifier for operating in a first mode and a second mode t switchably couple the second input of the first amplifier to the reference electrode of the three-electrode potentiostat. The method includes the step of, in the second mode, coupling the second input of the first amplifier to the reference electrode of the three-electrode potentiostat via the first capacitance device by coupling a second electrode of the first capacitance device to the reference electrode of the three-electrode potentiostat.
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公开(公告)号：US10581449B2
公开(公告)日：2020-03-03
申请号：US16096679
申请日：2017-04-25
Applicant: Agency for Science, Technology and Research
Inventor： Yoshio Nishida
Abstract: According to various embodiments, an inverter-based resistor may be provided. The inverter-based resistor may include at least one digital inverter, wherein each of the at least one digital inverter is configured to receive an input and provide an output, each of the at least one digital inverter further includes a positive voltage rail and a negative voltage rail, wherein the digital inverter input is connected to the inverter output and the positive voltage rail is connected to the negative voltage rail, and wherein a current flowing through the inverter-based resistor varies in direction and magnitude in response to a digital input provided to the positive voltage rail and the negative voltage rail.
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公开(公告)号：US11108386B2
公开(公告)日：2021-08-31
申请号：US16971226
申请日：2019-03-11
Applicant: Agency for Science, Technology and Research
Inventor： Yoshio Nishida , Ravinder Pal Singh
Abstract: Various embodiments may provide a comparator circuit arrangement. The comparator circuit arrangement may include a preamplifier having a first input configured to be coupled to a first input voltage, a second input configured to be coupled to a second input voltage, and an output configured to generate a preamplifier output signal based on the first input voltage and the second input voltage. The comparator circuit arrangement may also include a switch circuit arrangement coupled to the preamplifier, the switch circuit arrangement configured to deactivate the preamplifier upon the second input voltage exceeding the first input voltage and further configured to activate the preamplifier upon a fall of the second input voltage, and a pull-up circuit arrangement coupled to the output of the preamplifier, the pull-up circuit arrangement configured to provide a boost voltage to the preamplifier output signal for a predetermined duration upon the fall of the second input voltage.
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公开(公告)号：US20210119623A1
公开(公告)日：2021-04-22
申请号：US16971226
申请日：2019-03-11
Applicant: Agency for Science, Technology and Research
Inventor： Yoshio Nishida , Ravinder Pal Singh
Abstract: Various embodiments may provide a comparator circuit arrangement. The comparator circuit arrangement may include a preamplifier having a first input configured to be coupled to a first input voltage, a second input configured to be coupled to a second input voltage, and an output configured to generate a preamplifier output signal based on the first input voltage and the second input voltage. The comparator circuit arrangement may also include a switch circuit arrangement coupled to the preamplifier, the switch circuit arrangement configured to deactivate the preamplifier upon the second input voltage exceeding the first input voltage and further configured to activate the preamplifier upon a fall of the second input voltage, and a pull-up circuit arrangement coupled to the output of the preamplifier, the pull-up circuit arrangement configured to provide a boost voltage to the preamplifier output signal for a predetermined duration upon the fall of the second input voltage.
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