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公开(公告)号：US12015421B2
公开(公告)日：2024-06-18
申请号：US17484284
申请日：2021-09-24
发明人： Young Ho Jeong , Soo Young Park , Tae Jin Lee
摘要： Disclosed are a training method for a learning model for recognizing an acoustic signal, a method of recognizing an acoustic signal using the learning model, and devices for performing the methods. The method of recognizing an acoustic signal using a learning model includes identifying an acoustic signal including an acoustic event or acoustic scene, determining an acoustic feature of the acoustic signal, dividing the determined acoustic feature for each of a plurality of frequency band intervals, and determining the acoustic event or acoustic scene included in the acoustic signal by inputting the divided acoustic features to a trained learning model.
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公开(公告)号：US11962316B2
公开(公告)日：2024-04-16
申请号：US17451234
申请日：2021-10-18
CPC分类号： H03M1/0604 , H03M1/0614 , H03M1/60 , H04R2201/003
摘要： An analog-to-digital converter (ADC) includes a first controlled oscillator (CO) for generating at least one phase signal, and wherein the at least one phase signal generates a first output signal of the ADC; and at least one first frequency-controlled resistor (FDR) for receiving the at least one phase signal generated by the first CO, wherein the first CO and the at least one first FDR are coupled together at a first subtraction node of the ADC, and wherein the first subtraction node receives a first input signal.
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公开(公告)号：US20220236308A1
公开(公告)日：2022-07-28
申请号：US17721279
申请日：2022-04-14
申请人： IDT EUROPE GmbH
发明人： Reinhard KAUERT , Martin SCHMIDT
摘要： A method is provided for improving the EMC robustness of Integrated Capacitive Sensor systems with a sensor Signal-Conditioner (SSC). The SSC is connected with a capacitive integrating converter to convert a received signal into a bit stream. An oscillator provides a plurality of sampling frequencies. A counter connected with the capacitive integrating converter collects the bit stream and calculates the digital representative of the physical input which is than stored in an output register. The method includes performing some conversions with different sampling frequencies from the oscillator or a frequency divider by the capacitive integrating Signal-Converter; storing the results of the samplings and using the results in the following cycle to calculate for each sampling frequency a difference to the prior sampling of the same frequency; and calculating the digital representative of the input signal from the external sensing capacitor as the reverse weighted average of the samplings of the different frequencies.
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公开(公告)号：US10962623B1
公开(公告)日：2021-03-30
申请号：US15982224
申请日：2018-05-17
摘要： Systems and methods for measurement and management are disclosed that provide complex measurements cost-effectively at very high accuracy. These methods and systems in some cases achieve measurement accuracy exceeding the accuracy of the reference standards they rely on, and eliminate expensive and disadvantageous recalibration procedures. The accurate measurements are integrated with management functions, applying the measurement data to meet objectives of the integrated system and workflow goals of its user. The disclosed systems and methods comprise an explicit or expressly represented model both of themselves and of candidate external systems to be measured and managed. The models may be configured and reconfigured by the owner-user through either local or remote means. The system intelligently reconfigures itself to adapt dynamically to the conditions of measurement and the user's and system's goals at each moment. In an embodiment, the system includes high-accuracy and reconfigurable components including a meter or control head adapted for user precision assembly and maintenance that computes and displays or communicates the measurements, displaying measurements in desired units, grouping functions according to ergonomic and cognitive principles based on the activity and workflow of a user in relation to the internal model. The use of models permits the system to compute and provide complex and inferred measurements of ultimate interest to the user, including quantities that cannot be directed measured and only can be determined through reasoning or computation by applying models to raw measurement data. The precision-assembly modular electromechanical design further permits an owner-user to precisely assemble, maintain, modify the apparatus and calibrate the equipment for accuracy.
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公开(公告)号：US20210084504A1
公开(公告)日：2021-03-18
申请号：US16573661
申请日：2019-09-17
发明人： Yona Hania , Roi Yosy Ziv
摘要： A multi-band remote unit is disclosed. The multi-hand remote unit includes a number of radio frequency (RF) front-end circuits configured to generate a number of downlink RF communications signals associated with a number of frequency bands based on a number of downlink digital communications signals, respectively. The multi-band remote unit also includes a digital interface circuit and a digital processing circuit. The digital interface circuit is configured to receive an encapsulated downlink digital communications signal and generate the downlink digital communications signals associated with the frequency bands based on the encapsulated downlink digital communications signal. The digital processing circuit is configured to digitally process the downlink digital communications signals before providing the downlink digital communications signals to the RF front-end circuits. As such, it may be possible to share the digital processing circuit among RF front-end circuits, thus helping to reduce cost and/or power consumption of the multi-band remote unit.
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公开(公告)号：US20200382130A1
公开(公告)日：2020-12-03
申请号：US16767486
申请日：2018-11-21
申请人： SONY CORPORATION
发明人： YOSHINORI TAMORI
摘要： The present technology relates to a signal processing apparatus, a signal processing method, and a program that allow an improvement in the rate of modulation of PWM signals. Pulse width modulation (PWM) is performed to convert one of a 0 or 1 represented by a bit of a pulse density modulation (PDM) signal into which an audio signal has been PDM-modulated, into a maximum-length pulse of a maximum pulse width of a PWM signal having a period equal to the period of the PDM signal, and convert the other of the 0 or 1 of the PDM signal into a minimum-length pulse of a minimum pulse width of the PWM signal at a position adjacent to the center of the period of the PWM signal. The present technology is applicable, for example, to audio reproduction systems that reproduce audio signals.
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公开(公告)号：US10693488B2
公开(公告)日：2020-06-23
申请号：US16506191
申请日：2019-07-09
申请人： DENSO CORPORATION
发明人： Takamoto Watanabe
IPC分类号： H03M1/60 , H03M1/50 , G04F10/00 , H03K5/131 , H03M1/20 , H03M1/10 , H03M1/00 , H03M1/12 , H03B19/00
摘要： A digitalization device includes a first pulse delay unit, a second pulse delay unit, and an addition output unit. The first pulse delay unit includes (2n−(2m−1)) first delay units connected in series, and outputs a first signal according to the number of first delay units through which a first pulse signal passes. The second pulse delay unit includes (2n+(2m−1)) second delay units connected in series, and outputs a second signal according to the number of the second delay units through which a second pulse signal passes. Here, n and m are natural numbers, and n≥m. The addition output unit outputs, as a digital value, an addition value obtained by adding a numerical value based on the output of the first pulse delay unit and a numerical value based on the output of the second pulse delay unit.
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公开(公告)号：US10476513B1
公开(公告)日：2019-11-12
申请号：US16195629
申请日：2018-11-19
发明人： Soon-Jyh Chang , Li-Jen Chang
摘要： A successive approximation register (SAR) analog-to-digital converter (ADC) with high linearity for generating an n-bit converted output includes a first capacitor digital-to-analog (DAC) and a second capacitor DAC. One of the first capacitor DAC and the second capacitor DAC that has greater output signal is defined as a higher-voltage capacitor DAC, and the other as an un-switching capacitor DAC. In an m-th conversion phase, an (m−1)-th capacitor of the un-switching capacitor DAC is switched according to a comparison between output signals of the higher-voltage capacitor DAC and the un-switching capacitor DAC.
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公开(公告)号：US10447294B2
公开(公告)日：2019-10-15
申请号：US15608807
申请日：2017-05-30
发明人： Cesare Buffa , Fernando Cardes Garcia , Luis Hernandez-Corporales , Andrés Quintero Alonso , Andreas Wiesbauer
摘要： In accordance with an embodiment, a circuit includes a first oscillator having an oscillation frequency dependent on an input signal at a first input, where the first oscillator is configured to oscillate when an enable input is in a first state and freeze its phase or reduce its frequency when the enable input is in a second state. The circuit also includes a first time-to-digital converter having an input coupled to an output of the first oscillator, and a pulse generator having an input coupled to a first clock input of the circuit and an output coupled to the enable input of the first oscillator, where the pulse generator is configured to produce a pulse having pulse width less than a period of a clock signal at the first clock input.
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公开(公告)号：US20190115930A1
公开(公告)日：2019-04-18
申请号：US16162472
申请日：2018-10-17
CPC分类号： H03M1/121 , G01R13/02 , G01R13/0272 , G01R19/25 , G06F17/40 , G06F19/00 , H03M1/60 , H05K999/99
摘要： An oscilloscope comprises a first channel that includes a first channel physical input adapted to receive a first input signal, and a first channel digitizer connectable to the first channel physical input. The oscilloscope comprises a second channel that includes a second channel physical input adapted to receive a second input signal, and a second channel digitizer connected to the second channel physical input. The oscilloscope comprises a switch to change the first channel digitizer from connecting to the first channel physical input, to connecting to the second channel physical input. The oscilloscope includes a combiner to combine an output of the first channel digitizer and an output of the second channel digitizer, when a high bandwidth mode is activated, to generate an output that has a bandwidth of frequency content that exceeds a bandwidth of the first digitizer and exceeds a bandwidth of the second channel digitizer.
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