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公开(公告)号:US20230388099A1
公开(公告)日:2023-11-30
申请号:US18073528
申请日:2022-12-01
Applicant: Airoha Technology Corp.
Inventor: Chia-Hsing Hsu , Chun-Chia Huang
CPC classification number: H04L7/0079 , H04J3/0688
Abstract: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, a clock generator circuit, a clock and data recovery (CDR) circuit, and a clock multiplexer circuit. The RX circuit receives an input data to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data. The clock generator circuit generates an output clock. The CDR circuit generates an RX recovered clock according to the RX data. The clock multiplexer circuit receives the output clock and the RX recovered clock, and outputs the TX clock that is selected from the output clock and the RX recovered clock.
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公开(公告)号:US12120213B2
公开(公告)日:2024-10-15
申请号:US18073528
申请日:2022-12-01
Applicant: Airoha Technology Corp.
Inventor: Chia-Hsing Hsu , Chun-Chia Huang
CPC classification number: H04L7/0079 , H04J3/0688
Abstract: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, a clock generator circuit, a clock and data recovery (CDR) circuit, and a clock multiplexer circuit. The RX circuit receives an input data to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data. The clock generator circuit generates an output clock. The CDR circuit generates an RX recovered clock according to the RX data. The clock multiplexer circuit receives the output clock and the RX recovered clock, and outputs the TX clock that is selected from the output clock and the RX recovered clock.
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3.
公开(公告)号:US20230412354A1
公开(公告)日:2023-12-21
申请号:US17980566
申请日:2022-11-04
Applicant: Airoha Technology Corp.
Inventor: Chia-Hsing Hsu , Chun-Chia Huang
IPC: H04L7/00
CPC classification number: H04L7/0025 , H04L7/0008 , H04L7/0029
Abstract: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, and a noise reduction circuit. The RX circuit receives an input data according to an RX clock, to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data, wherein the TX clock is constrained to be in sync with the RX clock. The noise reduction circuit applies noise reduction to the RX data according to the TX data, to generate a noise-reduced RX data.
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公开(公告)号:US11855668B2
公开(公告)日:2023-12-26
申请号:US17963175
申请日:2022-10-10
Applicant: Airoha Technology Corp.
Inventor: Chia-Hsing Hsu , Wei-Ling Li
CPC classification number: H04B1/0475 , H03M1/0617
Abstract: A 10BASE-T transmitter includes a Manchester encoder circuit, a waveform shaper circuit, and digital-to-analog converter (DAC) circuit. The Manchester encoder circuit applies Manchester encoding to an input data to generate an encoded data. The waveform shaper circuit converts the encoded data into a plurality of digital codes. The DAC circuit generates a transmit (TX) waveform according to the plurality of digital codes. The waveform shaper circuit controls a portion of the plurality of digital codes for applying pre-compensation of inter-symbol interference (ISI) to the TX waveform.
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5.
公开(公告)号:US20230378983A1
公开(公告)日:2023-11-23
申请号:US17963175
申请日:2022-10-10
Applicant: Airoha Technology Corp.
Inventor: Chia-Hsing Hsu , Wei-Ling Li
CPC classification number: H04B1/0475 , H03M1/0617
Abstract: A 10BASE-T transmitter includes a Manchester encoder circuit, a waveform shaper circuit, and digital-to-analog converter (DAC) circuit. The Manchester encoder circuit applies Manchester encoding to an input data to generate an encoded data. The waveform shaper circuit converts the encoded data into a plurality of digital codes. The DAC circuit generates a transmit (TX) waveform according to the plurality of digital codes. The waveform shaper circuit controls a portion of the plurality of digital codes for applying pre-compensation of inter-symbol interference (ISI) to the TX waveform.
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