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公开(公告)号：US20240361799A1
公开(公告)日：2024-10-31
申请号：US18635817
申请日：2024-04-15
申请人： Rambus Inc.
发明人： Jun Kim , Pak Shing Chau , Wayne S. Richardson
CPC分类号： G06F1/08 , G06F1/10 , G06F13/1673 , G06F13/1689 , H03L7/07 , H03L7/0814 , H03L7/0995 , H04L7/0008 , H04L7/0033 , H04L7/10 , Y02D10/00
摘要： A memory system in which a timing drift that would occur in distribution of a first timing signal for data transport in a memory device is determined by measuring the actual phase delays occurring in a second timing signal that has a frequency lower than that of the first timing signal and is distributed in one or more circuits mimicking the drift characteristics of at least a portion of distribution of the first timing signal. The actual phase delays are determined in the memory device and provided to a memory controller so that the phases of the timing signals used for data transport may be adjusted based on the determined timing drift.
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公开(公告)号：US12068884B1
公开(公告)日：2024-08-20
申请号：US18321510
申请日：2023-05-22
CPC分类号： H04L12/40013 , G01V3/20 , G01V3/38 , G06F13/28 , H04L7/0008 , H04L12/40019 , H04L61/4552
摘要： A method for a multichannel geophysical data acquisition system is provided in the field of electrical resistivity tomography. Individual and autonomous node operating systems are provided. Separate communication channels for upstream and downstream data transfer, high voltage transfer and synchronization signals are provided. A novel use of high voltage isolation barriers is also provided. A direct memory access data transfer process is provided.
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公开(公告)号：US12058779B2
公开(公告)日：2024-08-06
申请号：US18193686
申请日：2023-03-31
申请人： CellSpinSoft Inc.
发明人： Gurvinder Singh , Marcos Klein , Vince Laviano
IPC分类号： H04W8/24 , G06F3/0482 , G06F16/958 , H04B7/26 , H04L7/00 , H04L9/40 , H04L49/552 , H04L65/00 , H04L65/403 , H04L67/02 , H04L67/06 , H04L67/10 , H04L67/1095 , H04W4/80 , H04W12/033 , H04W12/04 , H04W12/50 , H04W76/10 , H04W12/02 , H04W12/61 , H04W84/18
CPC分类号： H04W8/24 , G06F3/0482 , G06F16/958 , H04B7/26 , H04L7/0008 , H04L49/552 , H04L63/0435 , H04L63/0492 , H04L63/083 , H04L65/00 , H04L65/403 , H04L67/02 , H04L67/06 , H04L67/10 , H04L67/1095 , H04W4/80 , H04W12/033 , H04W12/04 , H04W12/50 , H04W76/10 , H04W12/02 , H04W12/61 , H04W84/18
摘要： Disclosed herein is a method and system for utilizing a digital data capture device in conjunction with a Bluetooth (BT) enabled mobile device for publishing data and multimedia content on one or more websites automatically or with minimal user intervention. A client application is provided on the BT enabled mobile device. In the absence of inbuilt BT capability, a BT communication device is provided on the digital data capture device. The BT communication device is paired with the BT enabled mobile device to establish a connection. The client application detects capture of data and multimedia content on the digital data capture device and initiates transfer of the captured data, multimedia content, and associated files. The digital data capture device transfers the captured data, multimedia content, and the associated files to the client application. The client application automatically publishes the transferred data and multimedia content on one or more websites.
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公开(公告)号：US12028437B2
公开(公告)日：2024-07-02
申请号：US18311129
申请日：2023-05-02
申请人： Apple Inc.
发明人： Christopher D. Finan , Alexander Ukanwa , Charles F. Dominguez , Jean-Didier Allegrucci , Jeffrey J. Irwin , Kalpana Bansal , Michael Bekerman , Remi Clavel
CPC分类号： H04L7/0016 , G06F1/12 , H04L7/0008
摘要： A method and apparatus for synchronizing a timebase is disclosed. A timebase management circuit includes limit circuitry, in a first clock domain, which generates, based on a global timebase, an initial timebase limit. The timebase management circuit includes, in a second clock domain, adjustment circuitry that generates an adjusted timebase limit based on the initial timebase limit. A storage circuit in the second clock domain stores a local timebase. Update circuitry, coupled to an output of the storage circuit, generates an updated local timebase using a clock signal in the second clock domain, wherein the updated local timebase is subject to the adjusted timebase limit.
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公开(公告)号：US20240178986A1
公开(公告)日：2024-05-30
申请号：US18516597
申请日：2023-11-21
申请人： Rambus Inc.
发明人： Carl W. WERNER , Masum HOSSAIN , Richelle L. Smith
IPC分类号： H04L7/00
CPC分类号： H04L7/0087 , H04L7/0008 , H04L7/0091
摘要： A communication system uses a differential edge modulation scheme having one of four or more values and a clock pulse is also encoded in each unit interval. A four-valued encoding may be as follows: prior to each unit interval, two signals are both at the same value; at the start of the unit interval, a first one of the signals is transitioned to indicate a first bit of the symbol; after a selected one of two delay periods that are less than the unit interval, the other signal to is transitioned indicate a second bit of the symbol; after this transition, both signals are again at the same value. The transitioning, at the start of the unit interval, provides an edge that may be extracted and used a timing reference.
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公开(公告)号：US20240154783A1
公开(公告)日：2024-05-09
申请号：US17983427
申请日：2022-11-09
发明人： Dotan David Levi , Wojciech Wasko
CPC分类号： H04L7/0008 , H04L7/06 , H04L47/6225
摘要： In one embodiment, a system includes a network interface controller to receive a first clock-synchronization message from a clock-synchronization leader device and send a second clock-synchronization messages to at least one clock-synchronization follower device, and a processor to execute software to generate the second clock-synchronization message, and generate a control dependency to condition sending the second clock-synchronization message by the network interface controller to the at least one clock-synchronization follower device on the network interface controller receiving the first clock-synchronization message from the clock-synchronization leader device.
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公开(公告)号：US11956162B2
公开(公告)日：2024-04-09
申请号：US18169418
申请日：2023-02-15
IPC分类号： H04L47/72 , H04L7/00 , H04L41/5003 , H04L47/56 , H04W48/16 , H04W72/0446
CPC分类号： H04L47/72 , H04L7/0008 , H04L41/5003 , H04L47/56 , H04W48/16 , H04W72/0446
摘要： An asynchronous medium access control layer scheduler increases efficiency for directional mesh networks by removing extra overhead in the time slots. The efficiency is increased by dividing time slots into sub-slots to allow for a receiving node to be offset by at least one sub-slot from the transmitting node. This enables the scheduler to more efficiently schedule operations for the nodes so that nodes can be performing other functions rather than waiting to receive a transmission or waiting after transmitting a transmission. The sub-slots may be sized to approximate the transmission propagation time or time of flight delay.
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公开(公告)号：US11953938B1
公开(公告)日：2024-04-09
申请号：US17740688
申请日：2022-05-10
申请人： Google LLC
发明人： Peter Hochschild , Alexander Lloyd , Wilson Cheng-Yi Hsieh , Robert Edman Felderman , Michael James Boyer Epstein
CPC分类号： G06F1/12 , G01S19/01 , H04J3/0661 , H04J3/0667 , H04L7/0008 , H04L7/0012 , H04L7/0016 , H04L43/106 , H04L67/10 , G06F11/1675
摘要： The present technology proposes techniques for generating globally coherent timestamps. This technology may allow distributed systems to causally order transactions without incurring various types of communication delays inherent in explicit synchronization. By globally deploying a number of time masters that are based on various types of time references, the time masters may serve as primary time references. Through an interactive interface, the techniques may track, calculate and record data relative to each time master thus providing the distributed systems with causal timestamps.
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公开(公告)号：US20240106620A1
公开(公告)日：2024-03-28
申请号：US18455891
申请日：2023-08-25
发明人： Takumi Nomura , Tatsuroh Saitoh
IPC分类号： H04L7/00
CPC分类号： H04L7/0008 , H04L2012/40273
摘要： Provided is a vehicle electronic system that includes: a first electronic device connected to a first communication network of a first communication standard; a second electronic device connected to a second communication network of a second communication standard; and a relay device connected to the first communication network and the second communication network. The relay device includes a relay device transmission unit that transmits, to the second electronic device, first time information indicating time synchronized in the first communication network.
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公开(公告)号：US20240085940A1
公开(公告)日：2024-03-14
申请号：US18508479
申请日：2023-11-14
发明人： Kwanwoo NOH , Sungho SEO , Yongwoo JEONG , Dongwoo NAM , Myungsub SHIN , Hyunkyu JANG
CPC分类号： G06F1/08 , G06F1/04 , G06F3/0632 , G06F3/0658 , G06F3/0679 , G06F13/4291 , G11C7/22 , G11C16/32 , H04L7/0004 , H04L7/0008
摘要： A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.
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