摘要:
Methods and systems for controlling access to a host processor is disclosed. One exemplary method comprises the steps of receiving a plurality of signaling packets and controlling access to a host processor, via a first and a second path, for at least a portion of the packets in accordance with a bandwidth limit for the respective path. An exemplary system comprises: a host processor; and a traffic manager coupled to the host processor via a first path and a second path. The traffic manager is configured to communicate at least a portion of the packets to the host processor via a selected one of the paths. The traffic manager is further configured to regulate traffic along the first path such that the bandwidth limit of the first path is respected, and to regulate traffic along the second path such that the bandwidth limit of the second path is respected.
摘要:
A system and method for providing statistics gathering within a packet network is disclosed. The system comprises a network processor, a traffic manager, a host processor, and a field programmable gate array. The network processor adds a header to received multimedia packets and the traffic manager measures and enforces multimedia flow rates. The host processor performs multimedia flow quality measurement services on a per flow basis, wherein the multimedia flow quality measurement services comprise maintaining current statistics for multimedia flows within the network processor including aggregate and minimum/maximum statistics for the multimedia flow. The field programmable gate array (FPGA) copies a received multimedia packet or a portion of the received multimedia packet, wherein the copy is utilized by the FPGA to perform statistics gathering via use of a latency engine, a lost packet calculation engine, a real-time transport control protocol packet jitter engine and a real-time transport protocol packet jitter engine.
摘要:
A system and method for determining a source of an Internet protocol packet (IP). Generally, the system comprises a memory and a processor. The processor compares a destination address of the IP packet to a first destination address stored within a first destination address cell of the memory, and compares a destination port of the IP packet to a first destination port stored within a first destination port cell of the memory. The network processor also compares a source address of the IP packet to a first source address stored within a first source address cell of the memory, and compares a source port of the IP packet to a first source port stored within a first source port cell of the memory, wherein the stored first source address and the stored first source port are associated with the stored first destination address and the stored first destination port. The network processor also stores the source address and source port of the IP packet within the memory to determine the source of the IP packet if: the destination address and destination port of the IP packet match the stored first destination address and stored first destination port; the source address and source port of the IP packet do not match the stored first source address and stored first source port; and the stored first source address and stored first source port are universally accepted bits.
摘要:
A system and method for determining a destination for an Internet protocol packet. Generally, with reference to the structure of the system, the system utilizes a memory and a processor. The processor is instructed by the memory to perform the steps of: searching a memory for a destination Internet protocol address associated with the Internet protocol packet, the memory organized into a series of rows, each row including one destination Internet protocol address column, one weight value column, and one destination media access control address column, wherein at least one of said rows comprises a destination Internet protocol address having at least one universal bit, wherein universal bits are bits that accept any value, use of said universal bits ensuring that said step of searching said memory for said destination Internet protocol address associated with said Internet protocol packet results in said memory always having said destination Internet protocol address therein; utilizing said weight factor to select, from the series, a row matching the destination Internet protocol address; reading a destination media access control address column from the selected row; discarding said Internet protocol packet if a value of the destination media access control address is zero; and adding the media access control address to the Internet protocol packet as the destination of the packet, if the destination media access control address is not equal to zero.