公开(公告)号：US20120120989A1

公开(公告)日：2012-05-17

申请号：US13294536

申请日：2011-11-11

申请人： Akihiro TORIYAMA ,  Kazuki WATANABE ,  Makoto SHINDO ,  Makoto TOYOSHIMA ,  Yosuke TANNO

发明人： Akihiro TORIYAMA ,  Kazuki WATANABE ,  Makoto SHINDO ,  Makoto TOYOSHIMA ,  Yosuke TANNO

IPC分类号： H04B1/40

CPC分类号： G06K19/0712

摘要： There is included a detection unit for detecting a magnitude of a surplus of a direct current to a source voltage generated by a voltage generation unit generating the source voltage from the direct current obtained by rectifying a signal inputted from an antenna terminal. A data processing unit operating at the source voltage and performing data processing on a transmission/reception signal includes a clock control unit for determining a frequency of a clock signal for the data processing based on the magnitude of the surplus current detected by the detection unit in a state where a frequency of the clock signal is set to a predetermined reference frequency. Since the power consumed by the data processing unit at the time of detecting the surplus of the direct current is determined by the specific reference frequency, the surplus of the direct current can be detected as an absolute surplus.

摘要翻译： 包括检测单元，用于检测由从由天线端子输入的信号进行整流获得的直流电流产生源电压的电压产生单元产生的直流电流的剩余量。 以源电压工作并对发送/接收信号执行数据处理的数据处理单元包括时钟控制单元，用于基于由检测单元检测到的剩余电流的大小来确定用于数据处理的时钟信号的频率 将时钟信号的频率设定为规定的基准频率的状态。 由于在检测到直流电的剩余时由数据处理单元消耗的功率由特定参考频率确定，所以可以将直流的剩余检测为绝对剩余。

公开(公告)号：US20090322484A1

公开(公告)日：2009-12-31

申请号：US12470942

申请日：2009-05-22

申请人： Akihiro TORIYAMA ,  Kazuki Watanabe

发明人： Akihiro TORIYAMA ,  Kazuki Watanabe

IPC分类号： G06K7/00 ,  H04B5/00 ,  G06K19/00

CPC分类号： G06K19/0723 ,  G06K19/0724

摘要： A semiconductor integrated circuit and an IC card mounted with the same are provided, in which a signal of any one of at least three kinds of reception signals can be received for a short time. An RF signal from an antenna is supplied in parallel to a first and a second demodulator circuit included in a demodulator circuit. The first demodulator circuit demodulates a first reception signal of a first degree of modulation. The second demodulator circuit demodulates a second reception signal having a first communication start signal (SOF), and a third reception signal having a second communication start signal (Preamble). The demodulated output signals of the first and the second demodulator circuit are supplied to a determination circuit. When the demodulation output by the first demodulator circuit is determined, it is determined that the first reception signal is currently received. When the demodulation output of the second reception signal by the second demodulator circuit is determined, it is determined that the second reception signal is currently received. When the demodulation output of the third reception signal by the second demodulator circuit is determined, it is determined that the third reception signal is currently received.

摘要翻译： 提供一种半导体集成电路和安装有该半导体集成电路的IC卡，其中可以在短时间内接收至少三种接收信号中的任何一种的信号。 来自天线的RF信号与包括在解调器电路中的第一和第二解调器电路并联地提供。 第一解调器电路解调第一调制度的第一接收信号。 第二解调器电路解调具有第一通信开始信号（SOF）的第二接收信号和具有第二通信开始信号（Preamble）的第三接收信号。 第一和第二解调器电路的解调输出信号被提供给确定电路。 当确定由第一解调器电路输出的解调时，确定当前接收到第一接收信号。 当确定第二解调器电路的第二接收信号的解调输出时，确定当前接收到第二接收信号。 当确定第二解调器电路的第三接收信号的解调输出时，确定当前接收到第三接收信号。