METHOD AND APPARATUS FOR COST-EFFECTIVE DESIGN OF LARGE-SCALE SENSOR NETWORKS
    1.
    发明申请
    METHOD AND APPARATUS FOR COST-EFFECTIVE DESIGN OF LARGE-SCALE SENSOR NETWORKS 有权
    大规模传感器网络成本有效设计的方法与装置

    公开(公告)号:US20070230353A1

    公开(公告)日:2007-10-04

    申请号:US11692874

    申请日:2007-03-28

    IPC分类号: H04J3/14 H04J1/16

    CPC分类号: H04L67/12

    摘要: Arrangements and methods for developing a software toolkit that can be used to design or obtain parameters for a sensor network. High-level guidelines on the basic relations between sensor network parameters like number of sensors, degree of quantization at each sensor, and the distortion requirements, based on a deep analysis on two basic coding possibilities (multiplexed point-to-point, distributed) are contemplated. By evaluating tradeoffs among the various parameters, an optimization framework to obtain the most cost-effective design with required quantization capabilities pertaining to given distortion criterion is provided.

    摘要翻译: 用于开发可用于设计或获取传感器网​​络参数的软件工具包的安排和方法。 基于对两种基本编码可能性(多点对点,分布式)的深入分析,关于传感器网络参数(如传感器数量,每个传感器的量化度和失真要求)之间的基本关系的高级指南是 预期。 通过评估各种参数之间的折衷,提供了一种优化框架,以获得具有与给定失真标准相关的所需量化能力的最具成本效益的设计。

    Circuit verification using computational algebraic geometry
    2.
    发明授权
    Circuit verification using computational algebraic geometry 有权
    使用计算代数几何的电路验证

    公开(公告)号:US08640065B2

    公开(公告)日:2014-01-28

    申请号:US13360083

    申请日:2012-01-27

    IPC分类号: G06F9/455 G06F17/50

    CPC分类号: G06F17/504

    摘要: In one exemplary embodiment of the invention, a method includes: receiving a first description for a circuit whose operation over a plurality of inputs is to be verified; receiving a second description for expected behavior of the circuit, where the expected behavior in the second description is expressed as a set of algebraic systems of multivariable polynomials over at least one Galois field; applying at least one computational algebraic geometry technique to a combination of the first description and the second description to determine whether the circuit is verified, where verification of the circuit confirms that at least one output obtained based on the first description corresponds to at least one expected value based on the expected behavior expressed in the second description; and outputting an indication as to whether the circuit is verified.

    摘要翻译: 在本发明的一个示例性实施例中,一种方法包括:接收对要对其进行验证的多个输入的操作的电路的第一描述; 接收对所述电路的预期行为的第二描述,其中所述第二描述中的预期行为被表示为在至少一个伽罗瓦域上的多变量多项式的代数系统集合; 将至少一个计算代数几何技术应用于第一描述和第二描述的组合以确定电路是否被验证,其中电路的验证确认基于第一描述获得的至少一个输出对应于至少一个预期的 基于在第二描述中表达的预期行为的价值; 并且输出关于电路是否被验证的指示。

    CIRCUIT VERIFICATION USING COMPUTATIONAL ALGEBRAIC GEOMETRY
    3.
    发明申请
    CIRCUIT VERIFICATION USING COMPUTATIONAL ALGEBRAIC GEOMETRY 有权
    使用计算代数几何的电路验证

    公开(公告)号:US20130198705A1

    公开(公告)日:2013-08-01

    申请号:US13360083

    申请日:2012-01-27

    IPC分类号: G06F17/50

    CPC分类号: G06F17/504

    摘要: In one exemplary embodiment of the invention, a method includes: receiving a first description for a circuit whose operation over a plurality of inputs is to be verified; receiving a second description for expected behavior of the circuit, where the expected behavior in the second description is expressed as a set of algebraic systems of multivariable polynomials over at least one Galois field; applying at least one computational algebraic geometry technique to a combination of the first description and the second description to determine whether the circuit is verified, where verification of the circuit confirms that at least one output obtained based on the first description corresponds to at least one expected value based on the expected behavior expressed in the second description; and outputting an indication as to whether the circuit is verified.

    摘要翻译: 在本发明的一个示例性实施例中,一种方法包括:接收对要对其进行验证的多个输入的操作的电路的第一描述; 接收对所述电路的预期行为的第二描述,其中所述第二描述中的预期行为被表示为在至少一个伽罗瓦域上的多变量多项式的代数系统集合; 将至少一个计算代数几何技术应用于第一描述和第二描述的组合以确定电路是否被验证,其中电路的验证确认基于第一描述获得的至少一个输出对应于至少一个预期的 基于在第二描述中表达的预期行为的价值; 并且输出关于电路是否被验证的指示。