公开(公告)号：US5070383A

公开(公告)日：1991-12-03

申请号：US295274

申请日：1989-01-10

申请人： Alexander B. Sinar ,  Levy Gerzberg ,  Yosef Y. Shacham ,  Ilan A. Blech ,  Eric R. Sirkin

发明人： Alexander B. Sinar ,  Levy Gerzberg ,  Yosef Y. Shacham ,  Ilan A. Blech ,  Eric R. Sirkin

IPC分类号： H01L23/525 ,  H01L27/102

CPC分类号： H01L27/1021 ,  H01L23/5252 ,  H01L2924/0002 ,  Y10S257/91 ,  Y10S257/926

摘要： A memory matrix comprises a plurality of word lines, a plurality of bit lines, and a stacked diode and voltage-variable resistor structure interconnecting bit lines to word lines. The stacked diode and voltage-variable resistor structure includes a doped region in a semiconductor substrate defining a work line, a doped polycrystalline silicon layer over said word line and forming a p-n junction therewith, and an amorphized region in the doped polycrystalline silicon layer having increased resistance over the non-amorphized portion of the doped polycrystalline silicon layer. A contact is made to the amorphized polycrystalline silicon material which preferably includes a titanium-tungsten barrier layer and an aluminum layer over the barrier layer. To improve the breakdown voltage of the diode structure, a region of opposite conductivity type is formed in the word line under the doped polycrystalline silicon layer either by out-diffusion of dopants from the polycrystalline silicon layer or by the implantation of dopant ions through the polycrystalline silicon layer into the word line.

摘要翻译： 存储矩阵包括多个字线，多个位线以及将位线互连到字线的堆叠二极管和电压可变电阻器结构。 层叠二极管和可变电压结构包括在限定工作线的半导体衬底中的掺杂区域，在所述字线上方形成掺杂多晶硅层并与其形成pn结，掺杂多晶硅层中的非晶化区域具有增加的 掺杂多晶硅层非非晶化部分的电阻。 对非晶化多晶硅材料进行接触，其优选在阻挡层上包括钛 - 钨阻挡层和铝层。 为了提高二极管结构的击穿电压，在掺杂多晶硅层下面的字线中形成相反导电类型的区域，通过掺杂剂从多晶硅层的扩散或通过掺杂剂离子注入多晶硅 硅层进入字线。

公开(公告)号：US4845045A

公开(公告)日：1989-07-04

申请号：US245115

申请日：1988-09-15

申请人： Yosef Y. Shacham ,  Alexander B. Sinar ,  Eric R. Sirkin ,  Ilan A. Blech

发明人： Yosef Y. Shacham ,  Alexander B. Sinar ,  Eric R. Sirkin ,  Ilan A. Blech

IPC分类号： H01L21/761 ,  H01L21/768

CPC分类号： H01L21/761 ,  H01L21/76886

摘要： An electrically programmable element is fabricated in a P-N junction isolated region of a semiconductor body by first extending the depth of the region in the body by introducing dopants through the region into the body by ion implantation or by diffusion and drive-in, and thereafter forming an amorphotized layer in the first region overlying the extended portion. The increased depth of the first region provided by the second region prevents damage to the P-N junction between the semiconductor body and the first region during formation of the amorphotized layer.

摘要翻译： 在半导体主体的PN结隔离区域中制造电可编程元件，首先通过离子注入或通过扩散和驱入将该区域中的掺杂剂引入到体内，然后形成 在第一区域中覆盖延伸部分的放射体层。 由第二区域提供的第一区域的增加的深度防止在形成放射敏化层期间损坏半导体本体与第一区域之间的P-N结。