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公开(公告)号:US11055165B2
公开(公告)日:2021-07-06
申请号:US16695968
申请日:2019-11-26
Applicant: Allegro MicroSystems, LLC
Inventor: Nicolas Rigoni , Fernando Orge , Lucas Intile , Nicolás Rafael Biberidis , Leandro Tozzi
Abstract: In one aspect, an integrated circuit (IC) includes a multiplexor configured to receive data from a non-volatile memory and configured to receive data from a shadow memory, a shift register configured to generate a first signature from the data received from the non-volatile memory and configured to generate a second signature from the data received from the shadow memory; a signature storage configured to store the first signature; and a shadow memory checking controller configured to enable the multiplexor to send the data from the non-volatile memory to the shift register, and send a command to reload the shadow memory with data from the non-volatile memory in response to receiving an error flag. The IC also includes a comparator circuit configured to compare the first signature and the second signature and configured to send the error flag in response to the first signature and the second signature being different.
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公开(公告)号:US20210157669A1
公开(公告)日:2021-05-27
申请号:US16695968
申请日:2019-11-26
Applicant: Allegro MicroSystems, LLC
Inventor: Nicolas Rigoni , Fernando Orge , Lucas Intile , Nicolás Rafael Biberidis , Leandro Tozzi
Abstract: In one aspect, an integrated circuit (IC) includes a multiplexor configured to receive data from a non-volatile memory and configured to receive data from a shadow memory, a shift register configured to generate a first signature from the data received from the non-volatile memory and configured to generate a second signature from the data received from the shadow memory; a signature storage configured to store the first signature; and a shadow memory checking controller configured to enable the multiplexor to send the data from the non-volatile memory to the shift register, and send a command to reload the shadow memory with data from the non-volatile memory in response to receiving an error flag. The IC also includes a comparator circuit configured to compare the first signature and the second signature and configured to send the error flag in response to the first signature and the second signature being different.
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