公开(公告)号：US11029370B1

公开(公告)日：2021-06-08

申请号：US16881238

申请日：2020-05-22

Applicant: Allegro MicroSystems, LLC

Inventor： Jonathan Zimmermann ,  Steven E. Snyder ,  Pablo Daniel Pareja Obregón

IPC: G01R33/07 ,  G01R33/00 ,  G01R19/155 ,  G01R1/20

Abstract: A sensor configured to generate a sensor output signal at a sensor output coupled to a pull up voltage through a pull up resistor includes a sensing element configured to generate a sensing element output signal indicative of a sensed parameter and a processor responsive to the sensing element output signal and configured to generate a processor output signal indicative of the sensed parameter. A digital output controller is responsive to the processor output signal and to a digital feedback signal and is configured to generate a controller output signal. An analog output driver is responsive to the controller output signal and configured to generate the sensor output signal at a first predetermined level or at a second predetermined level and a feedback circuit coupled between the sensor output and the digital output controller is configured to generate the digital feedback signal in response to the sensor output signal.

公开(公告)号：US20190025374A1

公开(公告)日：2019-01-24

申请号：US15657324

申请日：2017-07-24

Applicant: Allegro MicroSystems, LLC

Inventor： Mathew Drouin ,  Jonathan Zimmermann

IPC: G01R31/319 ,  G01R31/28 ,  G01R31/30

Abstract: An integrated circuit including a first multiplexor configured to receive one of a plurality of diagnostic signals from circuitry under test (DUT), the first multiplexor responsive to diagnostic signals provided thereto and configured to selectively output one of the diagnostic signals in response to a control signal, a second multiplexor configured to receive one of a plurality of reference signals from one of a plurality of nodes on a reference circuit, the second multiplexor configured to selectively output one of the diagnostic signals in response to a control signal, and a comparator configured to compare the diagnostic signal elicited from the first multiplexor with the reference signal elicited from the second multiplexor, the comparator further configured to output the result of the comparison between the diagnostic signal and the reference signal.

公开(公告)号：US10551439B2

公开(公告)日：2020-02-04

申请号：US15657324

申请日：2017-07-24

Applicant: Allegro MicroSystems, LLC

Inventor： Mathew Drouin ,  Jonathan Zimmermann

IPC: G01R31/319 ,  G01R31/28 ,  G01R31/30 ,  G01R35/00

Abstract: An integrated circuit including a first multiplexor configured to receive one of a plurality of diagnostic signals from circuitry under test (DUT), the first multiplexor responsive to diagnostic signals provided thereto and configured to selectively output one of the diagnostic signals in response to a control signal, a second multiplexor configured to receive one of a plurality of reference signals from one of a plurality of nodes on a reference circuit, the second multiplexor configured to selectively output one of the diagnostic signals in response to a control signal, and a comparator configured to compare the diagnostic signal elicited from the first multiplexor with the reference signal elicited from the second multiplexor, the comparator further configured to output the result of the comparison between the diagnostic signal and the reference signal.