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公开(公告)号:US11275127B2
公开(公告)日:2022-03-15
申请号:US16715492
申请日:2019-12-16
Applicant: Allegro MicroSystems, LLC
Inventor: Jay M. Towne , Peter Tengstrand , Devon Fernandez
Abstract: According to aspects of the disclosure, an apparatus is disclosed comprising: a controller; an analog-to-digital converter (ADC) coupled to the controller, the ADC including an input terminal for receiving a sensor signal from a transducer; and a diagnostic circuit coupled to the input terminal of the ADC and to the controller, the diagnostic circuit being configured to: generate a diagnostic signal that indicates whether a voltage at the input terminal of the ADC meets a first threshold, and provide the diagnostic signal to the controller, wherein the controller is configured to: receive a data sample from the ADC, detect whether the data sample meets a second threshold, and transition the apparatus into a safe state when: (i) the diagnostic signal indicates that the voltage at the input terminal does not meet the first threshold, and (ii) the data sample meets the second threshold.
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公开(公告)号:US20210181268A1
公开(公告)日:2021-06-17
申请号:US16715492
申请日:2019-12-16
Applicant: Allegro MicroSystems, LLC
Inventor: Jay M. Towne , Peter Tengstrand , Devon Fernandez
Abstract: According to aspects of the disclosure, an apparatus is disclosed comprising: a controller; an analog-to-digital converter (ADC) coupled to the controller, the ADC including an input terminal for receiving a sensor signal from a transducer; and a diagnostic circuit coupled to the input terminal of the ADC and to the controller, the diagnostic circuit being configured to: generate a diagnostic signal that indicates whether a voltage at the input terminal of the ADC meets a first threshold, and provide the diagnostic signal to the controller, wherein the controller is configured to: receive a data sample from the ADC, detect whether the data sample meets a second threshold, and transition the apparatus into a safe state when: (i) the diagnostic signal indicates that the voltage at the input terminal does not meet the first threshold, and (ii) the data sample meets the second threshold
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