Counters for large flow detection

    公开(公告)号:US10536360B1

    公开(公告)日:2020-01-14

    申请号:US16038731

    申请日:2018-07-18

    Abstract: Provided are systems and methods for managing historically large flows in network visibility monitoring. In some implementations, provided is an integrated circuit. The integrated circuit may be operable to receive packet information describing a packet at the cycle of a clock input. The packet may be associated with a packet flow being transmitted across a network. The integrated circuit may further generate keys using information identifying a packet flow provided by the packet information. The integrated circuit may further read values for counters and state information associated with each counter from a memory, using the keys. The integrated circuit may further determine from the state information that the packet flow identified by the packet information is a historically large packet flow. Upon determining that the packet flow is a historically large packet flow, the integrated circuit may further update an entry in a flow memory using the packet information.

    Network visibility monitoring
    2.
    发明授权

    公开(公告)号:US10003515B1

    公开(公告)日:2018-06-19

    申请号:US14983159

    申请日:2015-12-29

    CPC classification number: H04L67/2842 H04L43/026 H04L43/16 H04L47/2441

    Abstract: Provided are systems and methods for network visibility monitoring. In some implementation, provided is an integrated circuit. The integrated circuit may include a large-flow detection logic operable to determine whether a packet is associated with a large packet flow or a small packet flow, a large-flow caching logic operable to store information about packet flows, a sampling logic operable to sample packets, and a unique-flow estimation logic. The integrated circuit may be operable to receive packets from a network during a pre-determined interval, The integrated circuit may further determine an estimate of the number of unique flows represented by the packets, identify large packet flows by identifying packets associated with the large packet flows, store information about the large packet flows, determine packets associated with small packet flows, and sample the packets determined to be associated with the small packet flows to create packet samples.

    Decompression circuit
    3.
    发明授权

    公开(公告)号:US10361715B1

    公开(公告)日:2019-07-23

    申请号:US15997185

    申请日:2018-06-04

    Abstract: Provided are systems and methods, including an integrated circuit, for data decompression of data encoded using a fixed-length encoding technique. For a data set where some symbols appear more frequently than others, the frequent symbols can be encoded into a short encoded symbol, and the remaining symbols can be encoded into a long encoded symbol. A decompression circuit can include decoder circuits that, upon receiving a set of input bits, can determine whether the set of input bits include one long encoded symbol or one or more short encoded symbols. The decoder circuit can then decode the one long encoded symbol or the one or more short encoded symbol. The fixed length of the encoded symbols can enable the decompression circuit to output decoded symbols at a same rate at which the circuit receives encoded symbols.

    Large flow detection for network visibility monitoring

    公开(公告)号:US09979624B1

    公开(公告)日:2018-05-22

    申请号:US14983169

    申请日:2015-12-29

    CPC classification number: H04L43/0894 H04L43/16

    Abstract: Provided are systems and methods for large flow detection for network visibility monitoring. In some implementations, provided is an integrated circuit. The integrated circuit may be operable to receive packet information describing a packet at a cycle of a clock input. The packet may be associated with a packet flow being transmitted across a network. The integrated circuit may further generate a key using information identifying the packet flow provided by the packet information. The integrated circuit may further read a value for a counter from a counter memory using the key. The integrated circuit may determine whether the packet is associated with a large flow or a small flow using the counter and a packet size provided by the packet information. Upon determining that the packet is associated with a large flow, the integrated circuit may update an entry in a flow memory using the packet information.

    Notifications in integrated circuits

    公开(公告)号:US10896001B1

    公开(公告)日:2021-01-19

    申请号:US16145050

    申请日:2018-09-27

    Abstract: Provided are integrated circuit devices and methods for operating integrated circuit devices. In various examples, an integrated circuit device can be operable to determine, at a point in time during operation of the integrated circuit device, to generate a notification. The notification can include a type and a timestamp indicating the point in time. The notification can also include information about an internal status of the integrated circuit at the point in time. The device can further selectin a queue from a plurality of queues in a processor memory of the computing system that includes the integrated circuit. The device can further generate a write transaction including the notification, where the write transaction is addressed to the queue. The device can further output the write transaction using a communication interface of the device.

    Reconfigurable instruction
    6.
    发明授权

    公开(公告)号:US10803007B1

    公开(公告)日:2020-10-13

    申请号:US16146834

    申请日:2018-09-28

    Abstract: Provided are integrated circuit devices and methods for operating integrated circuit devices. In various examples, an integrated circuit device can include a memory for storing instructions a configuration register, and an instruction execution circuit. An instruction read from the memory can be a reconfigurable instruction. which includes a set of fields corresponding to a plurality of operations. Values in the fields can determine whether the operations are enabled or disabled. For example, a first value in a first field can enable a first operation. Whether the first operation is performed can further be determined by comparing a second value in a second field to a third value read from the configuration register. The value set in the configuration register thus can control whether the operation is performed.

    Sampling based on large flow detection for network visibility monitoring

    公开(公告)号:US10097464B1

    公开(公告)日:2018-10-09

    申请号:US14983165

    申请日:2015-12-29

    Abstract: Provided are systems and methods for sampling packets based on large flow detection, for network visibility monitoring. In some implementations, provided is an integrated circuit. The integrated circuit may include large-flow detection logic and a sampling determination logic. The integrated circuit may be operable to received packet information describing a packet a cycle of a clock input. The packet may be associated with a packet flow being transmitted through a network. The integrated circuit may further be operable to determine, using the large-flow detection logic, whether the packet is associated with a large packet flow or a small packet flow. Upon determining that the packet is associated with a small packet flow, the integrated circuit may update the sampling determination logic.

    Historically large flows in network visibility monitoring

    公开(公告)号:US10033613B1

    公开(公告)日:2018-07-24

    申请号:US14983174

    申请日:2015-12-29

    Abstract: Provided are systems and methods for managing historically large flows in network visibility monitoring. In some implementations, provided is an integrated circuit. The integrated circuit may be operable to receive packet information describing a packet at the cycle of a clock input. The packet may be associated with a packet flow being transmitted across a network. The integrated circuit may further generate keys using information identifying a packet flow provided by the packet information. The integrated circuit may further read values for counters and state information associated with each counter from a memory, using the keys. The integrated circuit may further determine from the state information that the packet flow identified by the packet information is a historically large packet flow. Upon determining that the packet flow is a historically large packet flow, the integrated circuit may further update an entry in a flow memory using the packet information.

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