Abstract:
Techniques to control the start point of an output voltage of a power supply for a short period after receive a “stop switching” signal, which will switch a DC-DC switching regulator from a pulse width modulation (PWM) mode to a linear mode to precisely position the output voltage at a certain level. In this way, the power supply can remove any output ripple caused by the PWM mode and can minimize or remove the sampling error to a low-power system in every cycle. In addition, the power supply can intelligently communicate a “power ready” signal back to the system, resulting in a synchronized system.
Abstract:
Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.
Abstract:
Apparatus and methods for a bias supply circuit to support power supply including a switched-mode voltage converter cascaded with an n-channel-based linear regulator are provided. In an example, a cascaded power supply system can include a switched-mode DC-to-DC power converter, including an input voltage node, a first stage output voltage node, and a bootstrapped floating bias voltage node, and a linear regulator circuit. The linear regulator circuit can include an n-channel field-effect transistor (NFET) pass transistor, including a drain terminal coupled to the first stage output voltage node, a gate terminal, and a source terminal configured to provide a second-stage output voltage, and a gate driver circuit, including a driver output coupled to the gate terminal of the NFET pass transistor, and a high side supply node configured to receive a bias voltage generated from the bootstrapped floating bias voltage node.
Abstract:
A switching power converter circuit comprises an input port, a first circuit supply rail having a first positive voltage greater than circuit ground, a second circuit supply rail having a second positive voltage greater than circuit ground, and an inductor electrically coupled to the input port, wherein inductor current flows in a first direction through the inductor to generate the first circuit supply rail and flows in an opposite direction through the inductor to generate the second circuit supply rail.